AD8304 Analog Devices, AD8304 Datasheet - Page 11

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AD8304

Manufacturer Part Number
AD8304
Description
160 DB Logarithmic Amplifier With Photo-diode Interface
Manufacturer
Analog Devices
Datasheet

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In addition to uses in filter and comparator functions, the buffer
amplifier provides the means to adjust both the slope and inter-
cept, which require a minimal number of external components.
The high input impedance at BFIN, low input offset voltage,
large output swing, and wide bandwidth of this amplifier permit
numerous transformations of the basic V
dard op amp circuit practices. For example, it has been noted
that to raise the gain of the buffer, and therefore the slope, a
feedback attenuator, R
between VLOG and the inverting input pin BFNG.
A wide range of gains may be used and the resistor magnitudes
are not critical; their parallel sum should be about equal to the
net source resistance at the noninverting input. When high gains
are used, the output dynamic range will be reduced; for maxi-
mum swing of 4.8 V, it will amount to simply 4.8 V/V
Thus, using a ratio of 3 , to set up a slope 30 mV/dB (600 mV/
decade), eight decades can be handled, while with a ratio of 5 ,
which sets up a slope of 50 mV/dB, (1 V/decade), the dynamic
range is 4.8 decades, or 96 dB. When using a lower positive
supply voltage, the calculation proceeds in the same way,
remembering to first subtract 0.2 V to allow for 0.1 V upper and
lower headroom in the output swing.
Alteration of the logarithmic intercept is only slightly more tricky.
First note that it will rarely be necessary to lower the intercept
below a value of 100 pA, since this merely raises all output volt-
ages further above ground. However, where this is required, the
first step is to raise the voltage V
from VLOG to VREF (2 V) as shown in Figure 4.
This has the effect of elevating V
lowering the slope to some extent because of the shunt effect of
R
may be increased as before, using a feedback attenuator around
the buffer. Table II lists some examples of lowering the inter-
cept combined with various slope variations.
NC = NO CONNECT
C
R1
750
C1
1nF
10nF
on the 5 kΩ output resistance. Then, if necessary, the slope
I
PD
NC
4
6
3
5
VPDB
VSUM
VSUM
INPT
VNEG
VPS2
1
PDB
10
A
and R
PWDN
~10k
COMPENSATION
ACOM
BIAS
TEMPERATURE
B
2
LOG
in Figure 3, should be inserted
LOG
14
by connecting a resistor, R
for small inputs while
VPS1
0.5V
LOG
VREF
VOUT
12
5k
signal, using stan-
11
VLOG
BFNG
BFIN
13
Y
7
8
9
V
P
VREF
decades.
RA
RZ
V
OUT
RB
C
,
V
(mV/decade)
200
200
200
300
300
300
400
400
400
500
500
500
Equations for use with Table II:
V
where
Generally, it will be useful to raise the intercept. Keep in mind
that this moves the V
output values. Figure 5 shows how this is achieved. The feedback
resistors R
third resistor, R
This raises the zero-signal voltage on BFNG which has the effect
of pushing V
alters the feedback ratio. However, this is readily compensated in
the design of the network. Table III lists the resistor values for
representative intercepts.
V
(mV/decade)
300
300
400
400
400
500
500
500
Equations for use with Table III:
where
Y
Y
OUT
V
G
G
=
OUT
= +
= +
G V
Table II. Examples of Lowering the Intercept
Table III. Examples of Raising the Intercept
1
1
A
=
and R
Y
OUT
G V
R
R
R R
×
B
B
A
R
C
, placed between the pin BFNG and VREF.
R
lower. Note that the addition of this resistor also
A
Y
and
B
Z
C
I
(pA)
1
10
50
1
10
50
1
10
50
1
10
50
I
(nA)
10
100
10
100
500
10
100
500
×
around the buffer are now augmented with a
Z
Z
+
R
LOG
log
and
R
Z
R
LOG
10
LOG
line in Figure 2 to the right, lowering all
R R
I
A
I
×
PD
= 5 Ω
Z
log
B
k
10
=
V
R
(k )
20.0
10.0
3.01
10.0
8.06
6.65
11.5
9.76
8.66
16.5
14.3
13.0
R
(k )
7.5
8.25
10
9.76
9.76
12.4
12.4
11.5
R
R
REF
I
A
A
I
A
A
PD
Z
×
+
×
 +
R
R
R R
B
B
V
A
R R
REF
R
(k )
100
100
100
12.4
12.4
12.4
8.2
8.2
8.2
8.2
8.2
8.2
R
(k )
37.4
130
16.5
25.5
36.5
12.4
16.5
20.0
A
AD8304
B
B
B
×
+
B
R
R
LOG
C
R
LOG
R
(k )
25
50
165
25
50
165
25
50
165
25
50
165
R
(k )
24.9
18.2
25.5
16.2
13.3
24.9
16.5
12.4
+
Z
C
R
Z

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