AD8310 Analog Devices, AD8310 Datasheet - Page 14

• Manufacturer Part Number: AD8310
• Description: Fast Response, DC - 440 Mhz, Voltage Out, 90 DB Logarithmic Amplifier
• Manufacturer: Analog Devices

AD8310
Output Filtering
In applications where maximum video bandwidth (and conse-
quently fast rise time) is desired, it is essential that the BFIN pin
be left unconnected and free of any stray capacitance.
The nominal output video bandwidth of 25 MHz, can be reduced
by connecting a ground-referenced capacitor (C
pin as shown in Figure 33. This is generally done to reduce output
ripple (at twice the input frequency for a symmetric input wave-
form such as sinusoidal signals).
C
The Video Bandwidth should typically be set at a frequency equal
to about one-tenth the minimum input frequency. This will
ensure that the output ripple of the demodulated log output, which
is at twice the input frequency, will be well filtered.
In many applications of log amps, it may be necessary to lower
the corner frequency of the post-demodulation filtering, in order
to achieve low output ripple while maintaining a rapid response
time to changes in signal level. An example of a four-pole active
filter is shown the AD8307 data sheet.
Lowering the High-Pass Corner Frequency of the Offset
Compensation Loop
In normal operation, using an AC-coupled input signal, the
OFLT pin should be left unconnected. Input-referred dc offsets
of about 1.5 mV in the signal path are nulled via an internal
offset control loop. This loop has a high-pass –3 dB corner at
about 2 MHz. In low frequency ac-coupled applications, it is
necessary to lower this corner frequency to prevent input signals
from being misinterpreted as offsets. An external capacitor on
OFLT will lower the high-pass corner to arbitrarily low frequencies
(Figure 34). For example, by using 1 F capacitor, the 3 dB
corner will be reduced to 60 Hz.
FILT
SIGNAL
INPUT
Figure 33. Lowering the Post-Demodulation Video
Bandwidth
is selected using the equation
C
Figure 32. Raising the Slope to 100 mV/dB
FILT
= 1/(2
C
52.3
FILT
0.01 F
0.01 F
C2
C1
= 1/(2
2 A/dB
3k
INLO COMM OFLT VOUT
INHI ENBL BFIN VPOS
8
1
3 k
0.01 F
3k
AD8310
7
2
AD8310
VIDEO BANDWIDTH) – 2.1pF
Video Bandwidth) –2.1 pF
+4
NC
NC = NO CONNECT
6
3
5
4
V
BFIN
OUT
4.7
FILT
R
12.1k
C
SLOPE
FILT
) to the BFIN
V
V
(2.7–5.5V)
OUT
S
100mV/dB
–14–
The corner frequency is set by the equation
where C
APPLICATIONS
The AD8310 is highly versatile and easy to use. Being complete,
it needs only a few external components, and most can be
immediately accommodated by using the simple connections
shown in the preceding section. A few examples of more special-
ized applications are provided here; see also the AD8307 data
sheet for further applications; note the slightly different pinout.
Cable-Driving
The AD8310 is capable of driving a grounded 100
for a supply voltage of 3 V or greater. If reverse-termination is
required when driving a 50
series with the output, as shown in Figure 35. The slope at the
load will then be 12 mV/dB. In some cases, it may be permis-
sible to operate the cable without a termination at the far end,
in which case the slope will not be lowered. Where a further
increase in slope is desirable, the scheme shown in Figure 32
may be used.
DC-Coupled Input
It may occasionally be necessary to provide response to dc
inputs. Since the AD8310 is internally dc-coupled, there is no
fundamental reason why this is precluded. However, there is a
practical constraint, which is that its differential inputs must be
positioned at least 2 V above the COM potential for proper
biasing of the first stage. Usually, the source will be a single-sided
ground-referenced signal, so it will thus be necessary to provide
level-shifting and a single-ended-to-differential conversion to
correctly drive the AD8310’s inputs.
Figure 36 shows how a level-shift to midsupply (2.5 V in this
example) and a single-ended-to-differential conversion can be
accomplished using the AD8138 differential amplifier. The four
499
(or bias) voltage of 2.5 is achieved by applying 2.5 V (from a
supply-referenced resistive divider) to the AD8138’s VOCM
pin. The differential outputs of the AD8138 directly drive the
1.1 k input impedance of the AD8310.
Figure 35. Output Response of Cable-Driver Application
Figure 34. Lowering the High-Pass Corner Frequency of
the Offset Control Loop
resistors set up a gain of unity. An output common-mode
OFLT
is the capacitor connected to OFLT.
F
AD8310
CORNER
AD8310
= 1/(2
VOUT
OFLT
cable, it should be included in
C
(SEE TEXT)
2625
OFLT
50
C
OFLT
50
)
load to 2.5 V,
REV. A