AT93C46A-10PC-2.5 ATMEL Corporation, AT93C46A-10PC-2.5 Datasheet
AT93C46A-10PC-2.5
Related parts for AT93C46A-10PC-2.5
AT93C46A-10PC-2.5 Summary of contents
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... The AT93C46A is available in space saving 8-pin PDIP, 8-pin JEDEC, and 8-Pin TSSOP packages. The AT93C46A is enabled through the Chip Select pin (CS), and accessed via a 3- wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK) ...
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... The AT93C46A is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V versions. Absolute Maximum Ratings* Operating Temperature .................................. - +125 C Storage Temperature ..................................... - +150 C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage........................................... 6.25V DC Output Current........................................................ 5.0 mA Block Diagram (1) Pin Capacitance Applicable over recommended operating range from T Test Conditions ...
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DC Characteristics Applicable over recommended operating range from + +2.5V to +5.5V (unless otherwise noted Symbol Parameter V Supply Voltage CC1 V Supply Voltage CC2 V Supply Voltage CC3 ...
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... PD0 Status Valid High Impedance DF t Write Cycle Time WP (1) Endurance 5.0V Page Mode Note: 1. This parameter is characterized and is not 100% tested. Instruction Set for the AT93C46A Instruction SB Op Code READ 1 10 EWEN 1 00 ERASE 1 11 WRITE 1 ...
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... Functional Description The AT93C46A is accessed via a simple and versatile three-wire serial communication interface. Device opera- tion is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic ‘1’) followed by the appropriate Op Code and the desired memory Address location ...
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... Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. AT93C46A 6 ...
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... READ Timing (1) EWEN Timing Note: 1. Requires a minimum of nine clock cycles. (1) EWDS Timing Note: 1. Requires a minimum of nine clock cycles AT93C46A ...
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... WRITE Timing HIGH IMPEDANCE (1)(2) WRAL Timing HIGH IMPEDANCE DO Notes: 1. Valid only 4.5V to 5.5V Requires a minimum of nine clock cycles. AT93C46A READY BUSY BUSY READY t WP ...
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ERASE Timing (1) TERAL Timing Note: 1. Valid only 4.5V to 5.5V ...
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... Ordering Code 2000 AT93C46A-10PC AT93C46A-10SC AT93C46A-10TC 2000 AT93C46A-10PI AT93C46A-10SI AT93C46A-10TI 1000 AT93C46A-10PC-2.7 AT93C46A-10SC-2.7 AT93C46A-10TC-2.7 1000 AT93C46A-10PI-2.7 AT93C46A-10SI-2.7 AT93C46A-10TI-2.7 500 AT93C46A-10PC-2.5 AT93C46A-10SC-2.5 AT93C46A-10TC-2.5 500 AT93C46A-10PI-2.5 AT93C46A-10SI-2.5 AT93C46A-10TI-2.5 Package Type Options Package Operation Range 8P3 Commercial 8S1 ( 8P3 Industrial 8S1 ...
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Packaging Information 8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA .400 (10.16) .355 (9.02) PIN 1 .300 (7.62) REF .210 (5.33) MAX .100 (2.54) BSC SEATING PLANE .150 (3.81) .115 (2.92) ...