LPC2148 Philips, LPC2148 Datasheet - Page 20

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LPC2148

Manufacturer Part Number
LPC2148
Description
16/32 Bit Microcontroller
Manufacturer
Philips
Datasheet

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Preliminary data sheet
6.14.1 Features
6.15.1 Features
6.14 UARTs
6.15 I
The LPC2142/2148 each contain two UARTs. In addition to standard transmit and receive
data lines, the LPC2148 UART1 also provides a full modem control handshake interface.
Compared to previous LPC2000 microcontrollers, UARTs in LPC2142/2148 introduce
fractional baud rate generator (in both UARTs) and auto-CTS/RTS flow-control functions
fully implemented in hardware (UART1 in LPC2148 only).
The LPC2142/2148 each contain two I
The I
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with the
capability to both receive and send information (such as memory)). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
The I
I
2
2
C-bus).
C-bus serial I/O controller
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
LPC2148 UART1 equipped with standard modem interface signals. This module also
provides full support for hardware flow control (auto-CTS/RTS).
Compliant with standard I
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
2
2
C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line
C-bus implemented in LPC2142/2148 supports bit rates up to 400 kbit/s (Fast
Rev. 01 — 22 June 2005
2
C-bus interface.
2
C-bus controllers.
Single-chip 16/32-bit microcontrollers
2
C-bus is a multi-master bus, it can be
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
LPC2142/2148
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