LPC2148 Philips, LPC2148 Datasheet - Page 9

• Manufacturer Part Number: LPC2148
• Description: 16/32 Bit Microcontroller
• Manufacturer: Philips

Philips Semiconductors
Table 3:
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[2]
[3]
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[5]
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9397 750 14985
Preliminary data sheet
Symbol
P1.29/TCK
P1.30/TMS
P1.31/TRST
D+
D−
RESET
XTAL1
XTAL2
RTXC1
RTXC2
V
V
V
V
V
V
SS
SSA
DD
DDA
REF
BAT
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input
function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.
Open-drain 5 V tolerant digital I/O I
functionality.
5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured
for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input, digital
section of the pad is disabled.
5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog output function. When
configured as the DAC output, digital section of the pad is disabled.
5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
The pull-up resistor’s value typically ranges from 60 kΩ to 300 kΩ.
Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).
5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.
Pad provides special analog functionality.
Pin description
Pin
56
52
20
10
11
57
62
61
3
5
6, 18, 25, 42,
50
59
23, 43, 51
7
63
49
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…continued
Type
I/O
I
I/O
I
I/O
I
I/O
I/O
I
I
O
I
O
I
I
I
I
I
I
2
C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output
Description
P1.29 — General purpose input/output digital pin (GPIO).
TCK — Test Clock for JTAG interface.
P1.30 — General purpose input/output digital pin (GPIO).
TMS — Test Mode Select for JTAG interface.
P1.31 — General purpose input/output digital pin (GPIO).
TRST — Test Reset for JTAG interface.
USB bidirectional D+ line.
USB bidirectional D− line.
External reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
Ground: 0 V reference.
Analog ground: 0 V reference. This should nominally be the same voltage as
V
3.3 V power supply: This is the power supply voltage for the core and I/O
ports.
Analog 3.3 V power supply: This should be nominally the same voltage as
V
power the on-chip PLL.
ADC reference: This should be nominally the same voltage as V
should be isolated to minimize noise and error. Level on this pin is used as a
reference for ADC(s) and DAC(s).
RTC power supply: 3.3 V on this pin supplies the power to the RTC.
SS
DD
, but should be isolated to minimize noise and error.
but should be isolated to minimize noise and error. This voltage is used to
Rev. 01 — 22 June 2005
Single-chip 16/32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
LPC2142/2148
DD
but
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