LPC2158 NXP Semiconductors, LPC2158 Datasheet - Page 15

• Manufacturer Part Number: LPC2158
• Description: Single-chip 16-bit/32-bit microcontrollers; 512 kB fash
• Manufacturer: NXP Semiconductors

NXP Semiconductors
6. Functional description
LPC2157_2158_2
Product data sheet
6.1 Architectural overview
6.2 On-chip flash program memory
6.3 On-chip static RAM
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of microprogrammed Complex
Instruction Set Computers (CISC). This simplicity results in a high instruction throughput
and impressive real-time interrupt response from a small and cost-effective processor
core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
The LPC2157/2158 incorporate a 512 kB flash memory system. This memory may be
used for both code and data storage. Programming of the flash memory may be
accomplished in several ways. It may be programmed In System via the serial port. The
application program may also erase and/or program the flash while the application is
running, allowing a great degree of flexibility for data storage field firmware upgrades, etc.
Due to the architectural solution chosen for an on-chip bootloader, flash memory available
for user’s code on LPC2157/2158 is 500 kB respectively.
The LPC2157/2158 flash memory provides a minimum of 400000 erase/write cycles and
20 years of data-retention.
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bit, 16-bit, and 32-bit. The LPC2157/2158 provide 32 kB and 40 kB of
static RAM.
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The standard 32-bit ARM set.
A 16-bit Thumb set.
Rev. 02 — 9 February 2009
Single-chip 16-bit/32-bit microcontrollers
LPC2157/2158
© NXP B.V. 2009. All rights reserved.
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