MT92220 Zarlink Semiconductor, MT92220 Datasheet - Page 64

• Manufacturer Part Number: MT92220
• Description: 1023 Channel Voice Over IP/AAL2 Processor
• Manufacturer: Zarlink Semiconductor

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The AAL2 VC assembly structure contains the ATM header that will be annexed to all cells generated on this VC. It
also contains diagnostic fields: the 32-bit Transmitted Cell Count and 32-bit Transmitted Byte Count indicate how
much traffic is being generated on this VC, and how efficiently cells are being assembled. It also contains a Cell
Route field, which allows cells on this VC to be sent to any of the 4 TX link A cell queues, 2 TX link B cell queues,
the RX CPU queue or the RX AAL2 queue. Cells can be sent to the RX CPU or RX AAL2 cell queues for internal
loopback, and in this case the low bits of the ATM header will be used as the AAL2 VC number to which the cell will
be sent in the RX AAL2 module.
The Prevent Scanning bit in the assembly structure, when high, ensures that no cells will be assembled for time-out
reasons. Finally, the Valid bit, when cleared, completely disables any cells from being generated on this VC.
7.2
Cells received from the network and identified as AAL2 are sent to the AAL2 disassembly module, which will break
them down into AAL2 CPS-packets before sending them to the packet disassembly module. The AAL2
disassembly module must identify the packet boundaries within the cells, finding the CID, Length and UUI of each
CPS-packet, checking the AAL2 HEC, and reporting all the types of errors that it can find.
The RX AAL2 VC module, when it receives a cell, begins by checking cell-level errors: if the current cell contains a
parity error, if the offset byte is greater than 47 bytes or a HEC error is detected on a CPS-packet that began in the
current cell, the current cell is discarded and the Lost bit is set, which means that the following cell will be treated
with no previous history.
The next series of errors to be checked are the inter-cell errors: for example, if a sequence number error is
detected, the pending cell must be discarded but the current cell can be treated. The same holds true for a HEC
error on the header of a packet that began in the previous cell, or for an offset byte whose value does not match the
expected value as a function of the LI of the previous packet.
Cell Route
Pending Cell Handle
ATM Header/ AAL2
VC Number
Transmitted Cell
Count
Transmitted Byte
Count
Field
RX AAL2 VC Treatment
Destination selection for cells sent by this VC structure. “xxxxxxx1” = TX Link A Raw Cell
Buffer 0;
“xxxxxx1x” = TX Link A Raw Cell Buffer 1;
“xxxxx1xx” = TX Link A Raw Cell Buffer 2;
“xxxx1xxx” = TX Link A Raw Cell Buffer 3;
“xxx1xxxx” = TX Link B Raw Cell Buffer 0;
“xx1xxxxx” = TX Link B Raw Cell Buffer 1;
“x1xxxxxx” = RX CPU Raw Cell Buffer;
“1xxxxxxx” = RX AAL2 Raw Cell Buffer.
Pointer to the currently pending cell. This pointer is always valid, even is Bytes in Cell is
zero. This pointer points to increments of 64 bytes in the SSRAM C.
This field contains the VPI/VCI that will be written in the cells that are sent by this VC
structure. When the RX AAL2 Raw Cell Buffer is selected as a destination (for internal
loopback cells), this field’s definition changes; it becomes the pointer to the RX AAL2 VC
Structure that will be used to extract CPS Packets from the cells sent on this VC. In this
mode, the low 16 bits of this field are used as a pointer to this structure, which points to
increments of 32 bytes.
Free running counter of the total number of cells sent on this VC.
Free running counter of the total number of AAL2 CPS Packet bytes sent on this VC
(thus excluding ATM headers, AAL2 Offset byte and any padding octets).
Table 20 - Fields and Description (continued)
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Description