MT93L16 Mitel Networks Corporation, MT93L16 Datasheet - Page 11

• Manufacturer Part Number: MT93L16
• Description: CMOS Low-voltage Acoustic Echo CANceller
• Manufacturer: Mitel Networks Corporation

Preliminary Information
Note: bits C
writes.
register to 0 (see Register Summary) exits bootload
mode, resetting the signature (SIG) register and
internal address generator for the next bootload. A
hardware reset (RESET=0) similarly returns the
MT93L16 to the ready state for the start of a
bootload.
Once the program has been loaded, to begin
execution from RAM, bootload mode must be
disabled (BOOT bit, C
enabled (RAM_ROMb bit, C
appropriate bits in the BRC register. During the
bootload process, however, ROM program execution
(RAM_ROMb bit, C
Table 5 for the effect of the BRC register settings on
Microport accesses and on program execution.
BRC Register
BRC Register
C
C
C
C
C
C
0 0 0 0
0 1 0 0
1 0 0 0
1 1 0 0
X 1 0 0
X 0 0 0
3
3
3
3
3
3
C
C
C
C
C
C
Bits
Bits
2
2
2
2
2
2
C
C
C
C
C
C
Resetting the bootload bit (C
1
1
1
1
1
1
1
C
C
C
C
C
C
C
0
0
0
0
0
0
0
are reserved, and must be set to zero.
R/W
R/W
W
W
W
R
R
R
3
=0) should be selected. See
FUNCTIONAL DESCRIPTION FOR USING THE BOOTABLE RAM
2
=0) and execution from RAM
NON-BOOTLOAD MODE - Microport Access is to device registers (DREGs)
Table 5 - Bootload RAM Control (BRC) Register States
BOOTLOAD MODE - Microport Access is to bootload RAM (BRAM)
(=
(=
(= 1 1 1 1 1 1 b)
a
a
3
other than 3fh
5
5
=1) by setting the
1 x x x x x b
0 x x x x x b
a
a
Address
Address
4
4
- BRAM address counter increments on microport writes (except to 3fh)
any
any
3fh
a
a
3
3
- SIG reg recalculates signature on microport writes (except to 3fh)
a
a
PROGRAM EXECUTION MODES
2
2
2
) in the BRC
a
a
1
1
(Execute program in RAM, while bootloading the RAM)
a
a
Execute program in ROM, while bootloading the RAM.
- BRAM address counter reset to initial (ready) state.
- BRAM address counter reset to initial (ready) state.
0
0
Execute program in ROM, bootload mode disabled.
Execute program in RAM, bootload mode disabled.
b)
b)
- SIG reg reseeded to initial (ready) state
- SIG reg reseeded to initial (ready) state
- NOT RECOMMENDED -
Following program loading and enabling of execution
from RAM, it is recommended that users set the
software reset bit in the Main Control (MC) register,
to ensure that the device updates the default register
values to those of the new program in RAM. Note: it
is important to use a software reset rather than a
hardware (RESET=0) reset, as the latter will return
the device to its default settings (which includes
execution from program ROM instead of RAM.)
To verify which code revision is currently running,
users can access the Firmware Revision Code
(FRC) register (see Register Summary). This
register reflects the identity code (revision number)
of the last program to run register initialization (which
follows a software or hardware reset.)
- Bootload frozen; BRAM contents are NOT affected.
- Bootload frozen; BRAM contents are NOT affected.
- Bootload frozen; BRAM contents are NOT affected.
Writes "data" to next byte in BRAM (bootloading.)
Reads back "data" = corresponding DREG value.
Writes "data" to corresponding DREG.
Reads back "data" = BRC reg value.
Reads back "data" = SIG reg value.
Writes "data" to BRC reg.
Data
Data
MT93L16
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