TSS461 ATMEL Corporation, TSS461 Datasheet - Page 38

• Manufacturer Part Number: TSS461
• Description: VAN Data Link Controller
• Manufacturer: ATMEL Corporation

CHRx: Channel
Received and Receive
Enable Command
Identifier Mask
Registers
ID_M [11:0]: Identifier
Mask
38
TSS461E
The two low order bits of this register contain the message status. Together with the RNW and
RTR bits of the command register (base_address + 0x01), they define the message type of this
channel (seesection “Messages Types”). As a general rule (see section “Abort”), the status bits
are only set by the TSS461E, so the user must reset them to perform a transmission
or/and a reception (CHRx). The received and transmitted bits are only set if the corresponding
frame is without errors or if the retry count has been exceeded.
The Identifier Mask registers (base_address + 0x06 and base_address + 0x07) allow bitwise
masking of the comparison between the identifier received and the identifier specified.
•
A value of 1 indicates comparison enabled.
A value of 0 indicates comparison disabled.
Read/Write registers
ID_M 11
ID_M 3
7
7
ID_M 10
ID_M 2
6
6
ID_M 1
ID_M 9
5
5
ID_M 0
ID_M 8
4
4
ID_M 7
3
x
3
ID_M 6
2
x
2
ID_M 5
1
x
1
4194C–AUTO–01/06
ID_M 4
(CHTx)
0
x
0