MD5811-d256-MECH M-Systems Inc., MD5811-d256-MECH Datasheet - Page 52
MD5811-d256-MECH
Manufacturer Part Number
MD5811-d256-MECH
Description
Mobile Diskonchip P3 Data Sheet
Manufacturer
M-Systems Inc.
Datasheet
1.MD5811-D256-MECH.pdf
(86 pages)
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8.12 Interrupt Status Register
Description:
Address (hex): 1020
49
Read/Write
Description
Reset Value
Bit No.
Bit No.
5-0
7-6
14
15
STATUS. Indicates which of the following interrupt sources created an interrupt:
0: Flash array is ready
1: Data protection violation
2: Reading or writing more flash data than was specified in the DCNT field of ECC Control
3: BCH ECC error detected (this feature is provided to support multi-page DMA transfers)
4: Real time clock
5: Completion of a DMA operation
Reserved for future use.
EDGE. Selects edge or level triggered interrupts:
0: Specifies level-sensitive interrupts in which the IRQ# output remains asserted until the
1: Specifies edge-sensitive interrupts in which the IRQ# output pulses low and return to
GMASK (Global Mask).
1: Enables the IRQ# output to be asserted. Setting this bit while one or more interrupts are
0: Forces the IRQ# output to the negated state.
This register indicates which interrupt source created an interrupt.
register[0]
interrupt is cleared.
logic 1.
pending will generate an interrupt.
Bit 7
0
RFU_0
R
Bit 6
0
Bit 5
Data Sheet, Rev. 0.3
0
Bit 4
Description
Description
0
STATUS
Bit 3
R/W
0
Bit 2
0
Bit 1
0
Mobile DiskOnChip P3
93-SR-009-8L
Bit 0
0
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