SST25VF080-33-4C-QA Silicon Storage Technology, Inc., SST25VF080-33-4C-QA Datasheet - Page 4

no-image

SST25VF080-33-4C-QA

Manufacturer Part Number
SST25VF080-33-4C-QA
Description
Voltage = 2.7 to 3.6 ;; Density = 8Mb ;; Organization = 1Mb X 8 ;; Speed = 0 - 20 MHZ ;; Temp. = Commercial ;; Package = Qfn/wson
Manufacturer
Silicon Storage Technology, Inc.
Datasheet
Advance Information
PRODUCT IDENTIFICATION
TABLE 2: P
MEMORY ORGANIZATION
The SST25VF080 SuperFlash memory array is organized
in 4 KByte sectors with 32 KByte overlay blocks.
©2003 Silicon Storage Technology, Inc.
Manufacturer’s ID
Device ID
FIGURE 2: SPI P
SST25VF080
SCK
CE#
SO
SI
RODUCT
MODE 3
MODE 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
ROTOCOL
I
DENTIFICATION
HIGH IMPEDANCE
Address
00000H
00001H
Data
BFH
80H
T2.0 1250
4
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
DEVICE OPERATION
The SST25VF080 is accessed through the SPI (Serial
Peripheral Interface) bus compatible protocol. The SPI bus
consist of four control lines; Chip Enable (CE#) is used to
select the device, and data is accessed through the Serial
Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK).
The SST25VF080 supports both Mode 0 (0,0) and Mode 3
(1,1) of SPI bus operations. The difference between the
two modes, as shown in Figure 2, is the state of the SCK
signal when the bus master is in Stand-by mode and no
data is being transferred. The SCK signal is low for Mode 0
and SCK signal is high for Mode 3. For both modes, the
Serial Data In (SI) is sampled at the rising edge of the SCK
clock signal and the Serial Data Output (SO) is driven after
the falling edge of the SCK clock signal.
DON'T CARE
8 Mbit SPI Serial Flash
MODE 3
MODE 0
1250 F02.0
SST25VF080
S71250-00-000
10/03

Related parts for SST25VF080-33-4C-QA