BSP-15 Equator Technologies, BSP-15 Datasheet - Page 47

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BSP-15

Manufacturer Part Number
BSP-15
Description
Broadband Signal Processor
Manufacturer
Equator Technologies
Datasheet

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4.9 Analog CRT
An RGB monitor can be directly driven by the
4.10 Digital RGB
September 6, 2002
Table 4-14 Reset Straps
Table 4-15 CRT Interface Signals
The BSP-15 processor provides a digital RGB interface that connects gluelessly to an active matrix flat
panel display using a pixel depth of 12, 18, or 24 bits.
vsync
hsync
pixelclk_out
iec958_out
video_ina[7:4]
video_inb[9:8]
ntsc_out_data[5:4]
video_ina[3:0]
gdac_fscale
gdac_comp
gdac_green
gdac_blue
reset_strap[0]
gdac_red
Signal
Signal
Signal
TOTAL
(rom_boot)
vsync
hsync
TOTAL
Pins
# of
1
1
1
1
1
1
1
7
Pins
# of
(1)
(6)
I/O
O
O
A
A
A
A
A
I/O
I
Table 4-16: Digital RGB interface signals
Description
Horizontal synchronization signal for CRT
Vref bypass and compensation capacitor
Vertical synchronization signal for CRT
# of
Pins
Full scale current adjusting resistor
Description
1
1
1
1
4
2
2
4
The signal is multiplexed with rom_data[0] and ntsc_out_data[0].
HWR.BSP15.DS.REV.H
Analog green output
Analog blue output
Analog red output
I/O
O
O
O
O
O
O
O
O
BSP-15
VDD = 1 = Flash ROM is used for boot
Vertical synchronization signal for CRT
Horizontal synchronization signal for CRT
Pixel clock
Blank
red[7:4]
red[3:2]
red[1:0]
green[7:4]
Description
GND = 0 = ROMless boot
DSP.
BSP-15 Processor Datasheet
35

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