ISL6115 Intersil Corporation, ISL6115 Datasheet - Page 2

• Manufacturer Part Number: ISL6115
• Description: Power Distribution Controllers
• Manufacturer: Intersil Corporation

Simplified Block Diagram
Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
GATE
V
I
I
SET
SEN
SS
SYMBOL
PGOOD
PWRON
GATE
CTIM
ISEN
ISET
VSS
V
DD
10µA
Current Set
Current Sense
External FET Gate Drive
Pin
Chip Return
Chip Supply
Current Limit Timing
Capacitor
Power Good Indicator
Power ON
18V
FUNCTION
2
UV DISABLE
+
ISL611X
FALLING
-
DELAY
ISL6115, ISL6116, ISL6117, ISL6120
EDGE
ENABLE
V
REF
+
-
Connect to the low side of the current sense resistor through the current limiting set resistor. This
pin functions as the current limit programming pin.
Connect to the more positive end of sense resistor to measure the voltage drop across this
resistor.
Connect to the gate of the external N-Channel MOSFET. A capacitor from this node to ground
sets the turn-on ramp. At turn-on this capacitor will be charged to V
V
12V chip supply. This can be either connected directly to the +12V rail supplying the switched
load voltage or to a dedicated V
Connect a capacitor from this pin to ground. This capacitor determines the time delay between
an overcurrent event and chip output shutdown (current limit time-out). The duration of current
limit time-out is equal to 93kΩ x C
Indicates that the voltage on the ISEN pin is satisfactory. PGOOD is driven by an open drain
N-Channel MOSFET and is pulled low when the output voltage (VISEN) is less than the UV
level for the particular IC.
PWRON is used to control and reset the chip. The chip is enabled when PWRON pin is driven
high or is open. After a current limit time out, the chip is reset by a low level signal applied to
this pin. This input has 20µA pull up capability.
UV
DD
OC
(ISL6116,17,20) by a 10µA current source.
+
+
-
-
WOCLIM
7.5K
18V
ENABLE
20µA
+
-
V
DD
CLIM
8V
SS
+
TIM
-
+12V supply.
POR
.
DESCRIPTION
+
-
1.86V
QN
Q
12V
RISING
PULSE
EDGE
R
R
S
20µA
-
+
DD
+5V (ISL6115) and to
PWRON
PGOOD
CTIM
V
DD