PIC16CR58A Microchip Technology, PIC16CR58A Datasheet - Page 37

• Manufacturer Part Number: PIC16CR58A
• Description: ROM-Based 8-Bit CMOS Microcontroller Series
• Manufacturer: Microchip Technology

7.4
The PIC16C5X family incorporates on-chip Power-On
Reset (POR) circuitry which provides an internal chip
reset for most power-up situations. To use this feature,
the user merely ties the MCLR/V
simplified block diagram of the on-chip Power-On
Reset circuit is shown in Figure 7-8.
The Power-On Reset circuit and the Device Reset
Timer (Section 7.5) circuit are closely related. On
power-up, the reset latch is set and the DRT is reset.
The DRT timer begins counting once it detects MCLR
to be high. After the time-out period, which is typically
18 ms, it will reset the reset latch and thus end the
on-chip reset signal.
A power-up example where MCLR is not tied to V
shown in Figure 7-10. V
stabilize before bringing MCLR high. The chip will
actually come out of reset T
goes high.
In Figure 7-11, the on-chip Power-On Reset feature is
being used (MCLR and V
V
there is no problem in getting a proper reset. However,
Figure 7-12 depicts a problem situation where V
rises too slowly. The time between when the DRT
senses a high on the MCLR/V
MCLR/V
is too long. In this situation, when the start-up timer
times out, V
and the chip is, therefore, not guaranteed to function
correctly. For such situations, we recommend that
external RC circuits be used to achieve longer POR
delay times (Figure 7-9).
For more information on PIC16C5X POR, see
Power-Up Considerations - AN522 in the Embedded
Control Handbook.
The POR circuit does not produce an internal reset
when V
DD
1998 Microchip Technology Inc.
Note:
is stable before the start-up timer times out and
DD
PP
Power-On Reset (POR)
declines.
When the device starts normal operation
(exits the reset condition), device operat-
ing parameters (voltage, frequency, tem-
perature, etc.) must be meet to ensure
operation. If these conditions are not met,
the device must be held in reset until the
operating conditions are met.
pin (and V
DD
has not reached the V
DD
) actually reach their full value,
DD
DD
is allowed to rise and
DRT
are tied together). The
PP
pin, and when the
msec after MCLR
PP
DD
pin to V
(min) value
DD
DD
Preliminary
. A
DD
is
FIGURE 7-9:
• External Power-On Reset circuit is required
• R < 40 k is recommended to make sure that
• R1 = 100 to 1 k will limit any current
only if V
helps discharge the capacitor quickly when
V
voltage drop across R does not violate the
device electrical specification.
flowing into MCLR from external capacitor C
in the event of MCLR pin breakdown due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
DD
V
DD
powers down.
D
DD
V
power-up is too slow. The diode D
DD
EXTERNAL POWER-ON
RESET CIRCUIT (FOR SLOW
V
R
DD
C
POWER-UP)
R1
PIC16C5X
MCLR
DS30453B-page 37
PIC16C5X