PIC16CR58A Microchip Technology, PIC16CR58A Datasheet - Page 112

• Manufacturer Part Number: PIC16CR58A
• Description: ROM-Based 8-Bit CMOS Microcontroller Series
• Manufacturer: Microchip Technology

PIC16C6X
12.2
In this mode, the USART uses standard nonreturn-to-
zero (NRZ) format (one start bit, eight or nine data bits
and one stop bit). The most common data format is
8-bits. An on-chip dedicated 8-bit baud rate generator
can be used to derive standard baud rate frequencies
from the oscillator. The USART transmits and receives
the LSb first. The USART’s transmitter and receiver are
functionally independent but use the same data format
and baud rate. The baud rate generator produces a
clock either x16 or x64 of the bit shift rate, depending
on bit BRGH (TXSTA<2>). Parity is not supported by
the hardware, but can be implemented in software (and
stored as the ninth data bit). Asynchronous mode is
stopped during SLEEP.
Asynchronous mode is selected by clearing bit SYNC
(TXSTA<4>).
The USART Asynchronous module consists of the fol-
lowing important elements:
• Baud Rate Generator
• Sampling Circuit
• Asynchronous Transmitter
• Asynchronous Receiver
12.2.1
The USART transmitter block diagram is shown in
Figure 12-7. The heart of the transmitter is the transmit
(serial) shift register (TSR). The shift register obtains its
data from the read/write transmit buffer, TXREG. The
TXREG register is loaded with data in software. The
TSR register is not loaded until the STOP bit has been
transmitted from the previous load. As soon as the
STOP bit is transmitted, the TSR is loaded with new
data from the TXREG (if available). Once the TXREG
register transfers the data to the TSR register (occurs
in one T
TXIF (PIR1<4>) is set. This interrupt is enabled/dis-
FIGURE 12-7: USART TRANSMIT BLOCK DIAGRAM
DS30234D-page 112
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
CY
USART Asynchronous Mode
USART ASYNCHRONOUS TRANSMITTER
) the TXREG register is empty and flag bit
TXIE
Interrupt
TXEN
TXIF
Baud Rate Generator
SPBRG
Baud Rate CLK
MSb
(8)
TX9D
TSR register
TX9
TXREG register
8
Data Bus
abled by setting/clearing enable bit TXIE (PIE1<4>).
Flag bit TXIF will be set regardless of the state of
enable bit TXIE and cannot be cleared in software. It
will reset only when new data is loaded into the TXREG
register. While flag bit TXIF indicates the status of the
TXREG register, another bit, TRMT (TXSTA<1>)
shows the status of the TSR register. Status bit TRMT
is a read only bit which is set when the TSR register is
empty. No interrupt logic is tied to this bit, so the user
has to poll this bit in order to determine if the TSR reg-
ister is empty.
Transmission is enabled by setting enable bit TXEN
(TXSTA<5>). The actual transmission will not occur
until the TXREG register has been loaded with data
and the baud rate generator (BRG) has produced a
shift clock (Figure 12-7). The transmission can also be
started by first loading the TXREG register and then
setting enable bit TXEN. Normally when transmission
is first started, the TSR register is empty, so a transfer
to the TXREG register will result in an immediate trans-
fer to TSR register resulting in an empty TXREG regis-
ter. A back-to-back transfer is thus possible (Figure 12-
9). Clearing enable bit TXEN during a transmission will
cause the transmission to be aborted and will reset the
transmitter. As a result the RC6/TX/CK pin will revert to
hi-impedance.
In order to select 9-bit transmission, transmit bit TX9
(TXSTA<6>) should be set and the ninth bit should be
written to bit TX9D (TXSTA<0>). The ninth bit must be
written before writing the 8-bit data to the TXREG reg-
ister. This is because a data write to the TXREG regis-
ter can result in an immediate transfer of the data to the
TSR register (if the TSR is empty). In such a case, an
incorrect ninth data bit maybe loaded in the TSR regis-
ter.
Note 1: The TSR register is not mapped in data
Note 2: Flag bit TXIF is set when enable bit TXEN
LSb
0
TRMT
memory so it is not available to the user.
is set.
Pin Buffer
and Control
SPEN
1997 Microchip Technology Inc.
RC6/TX/CK pin