PIC16F627-04 Microchip Technology, PIC16F627-04 Datasheet - Page 58
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PIC16F627-04
Manufacturer Part Number
PIC16F627-04
Description
FLASH-Based 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.PIC16F627-04.pdf
(160 pages)
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PIC16F62X
9.1
There are eight modes of operation for the
comparators. The CMCON register is used to select
the mode. Figure 9-1 shows the eight possible modes.
The TRISA register controls the data direction of the
comparator pins for each mode. If the comparator
FIGURE 9-1:
DS40300B-page 58
Comparators Reset (POR Default Value)
CM2:CM0 = 000
Two Independent Comparators
CM2:CM0 = 100
Two Common Reference Comparators
CM2:CM0 = 011
One Independent Comparator
CM2:CM0 = 101
A = Analog Input, port reads zeros always.
D = Digital Input.
CIS (CMCON<3>) is the Comparator Input Switch.
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
Comparator Configuration
COMPARATOR I/O OPERATING MODES
D
D
A
A
A
A
A
A
A
D
A
A
A
A
A
A
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
C1
C2
C1
C2
C1
C2
C1
C2
Off (Read as ’0’)
C2OUT
Off (Read as ’0’)
Off (Read as ’0’)
C1OUT
C2OUT
C1OUT
C2OUT
Preliminary
Two Common Reference Comparators with Outputs
CM2:CM0 = 110
Comparators Off
CM2:CM0 = 111
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 010
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
RA4/T0CKI/C20
Three Inputs Multiplexed to Two Comparators
CM2:CM0 = 001
RA0/AN0
RA3/AN3/C10
RA1/AN1
RA2/AN2
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown
in Table 12-2.
Note:
Comparator interrupts should be disabled
during a comparator mode change other-
wise a false interrupt may occur.
A
A
A
A
A
A
A
A
D
D
D
D
Open Drain
A
D
A
A
CIS = 0
CIS = 1
CIS = 0
CIS = 1
CIS = 0
CIS = 1
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
1999 Microchip Technology Inc.
C1
C2
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
Vin-
Vin+
C1
C2
C1
C2
C1
C2
Off (Read as ’0’)
Off (Read as ’0’)
From Vref Module
C1OUT
C2OUT
C1OUT
C2OUT
C1OUT
C2OUT