PIC18F8493 Microchip Technology, PIC18F8493 Datasheet - Page 46

• Manufacturer Part Number: PIC18F8493
• Description: Flash Microcontrollers
• Manufacturer: Microchip Technology

PIC18F6393/6493/8393/8493
FIGURE 4-3:
TABLE 4-2:
DS39896B-page 46
130
131
132
135
137
Note 1:
Param
No.
Note 1:
A/D CLK
A/D DATA
SAMPLE
2:
3:
4:
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
AD
CNV
ACQ
SWC
DIS
2:
GO
Q4
The time of the A/D clock period is dependent on the device frequency and the T
ADRES registers may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
(1)
If the A/D clock source is selected as RC, a time of T
to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
132
A/D CONVERSION REQUIREMENTS
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert → Sample
Discharge Time
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
11
(3)
to V
10
SS
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
or V
OLD_DATA
9
SS
(2)
to V
. . .
SAMPLING STOPPED
CY
DD
is added before the A/D clock starts. This allows the SLEEP instruction
). The source impedance (R
CY
. . .
130
131
cycle.
Min
0.8
1.4
1.4
0.2
13
—
—
—
3
(Note 4)
12.5
25.0
Max
14
—
—
1
3
2
(1)
(1)
Units
1
T
μs
μs
μs
μs
μs
μs
AD
S
© 2009 Microchip Technology Inc.
) on the input channels is 50Ω.
T
V
V
A/D RC mode
V
0
OSC
REF
DD
DD
AD
= 3.0V; T
= 3.0V; A/D RC mode
based, V
full range
clock divider.
NEW_DATA
DONE
Conditions
T
CY
OSC
REF
www.DataSheet4U.com
based,
≥ 3.0V