CM3202-02 California Micro Devices Corporation, CM3202-02 Datasheet - Page 9

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CM3202-02

Manufacturer Part Number
CM3202-02
Description
Ddr Vddq And Termination Voltage Regulator
Manufacturer
California Micro Devices Corporation
Datasheet

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Application Info (cont’d)
current. The CM3202-02 is designed for optimal
operation from a nominal 3.3VDC bus, but can work
with VIN up to 5V. When operating at higher VIN
voltages, attention must be given to the increased
package
increased heat generation. Limited by the package
thermal resistance, the maximum output current of the
device at higher VIN cannot exceed the limit imposed
by the maximum power dissipation value.
V
such as a comparator, with little current draw. An
adequate V
divider of precision, matched resistors from V
ground. A small ceramic bypass capacitor can also be
added for improved noise performance.
Input and Output Capacitors
The CM3202-02 requires that at least a 220
electrolytic capacitor be located near the VIN pin for
stability and to maintain the input bus voltage during
load transients. An additional 4.7
between the VIN and GND, located as close as
possible to those pins, is recommended to ensure
stability.
At a minimum, a 220μF electrolytic capacitor is
recommended for the V
4.7μF ceramic capacitor between the V
located very close to those pins, is recommended.
At a minimum, a 220
recommended for the V
should have low ESR to achieve best output transient
response. SP or OSCON capacitors provide low ESR
at high frequency, and thus are a good choice. In
addition, place a 4.7
V
total ESR must be low enough to keep the transient
within the V
source to sink. An average current step of ±0.5A
requires:
Both outputs will remain stable and in regulation even
during light or no load conditions. The general
recommendation for circuit stability for the CM3202-02
requires the following:
© 2007 California Micro Devices Corp. All rights reserved.
05/25/07
REF
TT
ESR
pin and GND, located very close to those pins. The
is typically routed to inputs with high impedance,
<
40mV
-------------- -
1A
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
power
TT
REF
window of 40mV during the transition for
=
can be created with a simple voltage
40mΩ
μ
dissipation
F ceramic capacitor between the
μ
DDQ
F electrolytic capacitor is
TT
output. This capacitor
output. An additional
μ
and
F ceramic capacitor
DDQ
proportionally
and GND,
DDQ
μ
to
F
Tel: 408.263.3214
1.) C
range of –40 to +85°C.
2.) C
range of –25 to +85°C.
Adjusting VDDQ Output Voltage
The CM3202-02 internal bandgap reference is set at
1.25V. The V
resistor divider, R1 and R2:
where V
is
R1=4.42k ,
(V
Shutdown
ADJSD also serves as a shutdown pin. When this is
pulled high (SHDN_H), both the VDDQ and the VTT
outputs tri-state and could sink/source less than 10μA.
During shutdown, the quiescent current is reduced to
less than 0.5mA, independent of output load.
It is recommended that a low leakage Schottky diode
be placed between the ADJSD Pin and an external
shutdown signal to prevent interference with the ADJ
pin’s normal operation. When the diode anode is pulled
low, or left open, the CM3202-02 is again enabled.
Current Limit and Over-temperature Protection
The CM3202-02 features internal current limiting with
thermal protection. During normal operation, V
limits the output current to approximately 2A and V
limits the output current to approximately ±2A. When
V
output current folds back to a lower level (~1A) until the
over-current condition ends. While current limiting is
designed to prevent gross device failure, care should
be taken not to exceed the power dissipation ratings of
the package. If the junction temperature of the device
exceeds 170°C (typical), the thermal protection
circuitry triggers and tri-states both VDDQ and VTT
outputs. Once the junction temperature has cooled to
below about 120°C the CM3202-02 returns to normal
operation.
V
TT
DDQ
DDQ
R
in
is current limiting into a hard short circuit, the
in
1
=1.8V, V
=C
=
=R
=C
ADJ
V
ddq
Ω
2
ddq
ADJ
=10k
=C
= 1.25V. The recommended divider value
=C
DDQ
×
TT
tt
R2=10k
tt
=220
R1
-------------------- -
Ω
=0.9V).
Fax: 408.263.7846
=100
R2
+
voltage is adjustable by using a
R2
for
μ
μ
F/4.7
Ω
F/2.2
DDR-1
μ
for
μ
F for the full temperature
F for the temperature
PRELIMINARY
DDR-2
CM3202-02
application,
www.cmd.com
application
DDQ
and
TT
9

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