74ABT241CSCX Fairchild Semiconductor, 74ABT241CSCX Datasheet

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74ABT241CSCX

Manufacturer Part Number
74ABT241CSCX
Description
IC BUFF/DVR TRI-ST DUAL 20SOIC
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheet

Specifications of 74ABT241CSCX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 1999 Fairchild Semiconductor Corporation
74ABT241CSC
74ABT241CSJ
74ABT241CMSA
74ABT241CMTC
74ABT241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The ABT241 is an octal buffer and line driver with 3-STATE
outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver.
Ordering Code:
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
MSA20
MTC20
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS011691
Features
Pin Descriptions
Truth Table
H
L
X
Z
OE
OE
I
O
Non-inverting buffers
Output sink capability of 64 mA, source capability of
32 mA
Guaranteed latchup protection
High impedance glitch free bus loading during entire
power up and power down cycle
Nondestructive hot insertion capability
0
LOW Voltage Level
Immaterial
High Impedance
HIGH Voltage Level
Pin Names
–I
0
OE
–O
1
2
7
H
L
L
Package Description
1
7
I
0–3
X
H
L
Output Enable Input (Active LOW)
Output Enable Input (Active HIGH)
Inputs
Outputs
O
H
Z
0–3
L
January 1995
Revised November 1999
Description
OE
H
H
L
2
www.fairchildsemi.com
I
4–7
H
X
L
O
H
4–7
Z
L

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74ABT241CSCX Summary of contents

Page 1

... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 1999 Fairchild Semiconductor Corporation Features Non-inverting buffers Output sink capability of 64 mA, source capability of ...

Page 2

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in ...

Page 3

DC Electrical Characteristics (SOIC package) Symbol Parameter V Quiet Output Maximum Dynamic V OLP OL V Quiet Output Minimum Dynamic V OLV OL V Minimum HIGH Level Dynamic Output Voltage OHV V Minimum HIGH Level Dynamic Input Voltage IHD V ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number MSA20 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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