BC41B143A-ds-003Pc CSR, BC41B143A-ds-003Pc Datasheet - Page 81
BC41B143A-ds-003Pc
Manufacturer Part Number
BC41B143A-ds-003Pc
Description
Blue Core ROM Plug-n-Go
Manufacturer
CSR
Datasheet
1.BC41B143A-DS-003PC.pdf
(94 pages)
- Current page: 81 of 94
- Download datasheet (3Mb)
10.11
BlueCore4-ROM Plug-n-Go may be reset from several sources:
The RESET pin is an active high reset and is internally filtered using the internal low frequency clock oscillator. A reset
will be performed between 1.5ms and 4.0ms following RESET being active. It is recommended that RESET be applied
for a period greater than 5ms. The RESETB pin is the active low version of RESET and is OR'd on-chip with the active
high RESET, with either causing the reset function.
The power on reset occurs when the VDD_CORE supply falls below typically 1.5V and is released when VDD_CORE
rises above typically 1.6V.
At reset the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state. The PIOs have weak
pull-downs.
Following a reset, BlueCore4-ROM Plug-n-Go assumes the maximum XTAL_IN frequency, which ensures that the
internal clocks run at a safe (low) frequency until BlueCore4-ROM Plug-n-Go is configured for the actual XTAL_IN
frequency. If no clock is present at XTAL_IN, the oscillator in BlueCore4-ROM Plug-n-Go free runs, again at a safe
frequency.
BC41B143A-ds-003Pc
RESET or RESETB pins
Power on reset
A UART break character
Via a software configured watchdog timer
RESET and RESETB
© Cambridge Silicon Radio Limited 2005
Advance Information
Device Terminal Descriptions
Page 81 of 94
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