S-1721 Seiko Instruments, S-1721 Datasheet - Page 18

• Manufacturer Part Number: S-1721
• Description: SUPER-SMALL PACKAGE 2-CIRCUIT HIGH RIPPLE-REJECTION LOW CURRENT CONSUMPTION LOW DROPOUT CMOS VOLTAGE REGULATOR
• Manufacturer: Seiko Instruments

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SUPER-SMALL PACKAGE 2-CIRCUIT HIGH RIPPLE-REJECTION LOW CURRENT CONSUMPTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1721 Series
Operation
1. Basic operation
2. Output transistor
Figure 23 shows the block diagram of S-1721 Series.
The error amplifier compares the reference voltage (V
feedback resistors R
not influenced by the input voltage and temperature change, to the output transistor.
In the S-1721 Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that V
current flowing from the VOUT pin through a parasitic diode to the VIN pin.
OUT
*1. Parasitic diode
VSS
Current
VIN
supply
does not exceed V
s
Reference voltage
and R
V
ref
circuit
f
. It supplies the gate voltage necessary to maintain the constant output voltage which is
IN
+ 0.3 V to prevent the voltage regulator from being damaged due to inverse
−
+
amplifier
Seiko Instruments Inc.
Error
Figure 23
ref
) with V
fb
, which is the output voltage resistance-divided by
R
R
s
f
V
*1
fb
VOUT
Rev.1.1
_00