FM25W64 Ramtron Corporation, FM25W64 Datasheet - Page 6

• Manufacturer Part Number: FM25W64
• Description: 64kb Wide Voltage Spi F-ram Features
• Manufacturer: Ramtron Corporation

RDSR - Read Status Register
The RDSR command allows the bus master to verify
the contents of the Status register. Reading Status
provides information about the current state of the
write protection features. Following the RDSR op-
code, the FM25W64 will return one byte with the
contents of the Status register. The Status register is
described in detail below.
Status Register & Write Protection
The write protection features of the FM25W64 are
multi-tiered. First, a WREN op-code must be issued
prior to any write operation. Assuming that writes are
enabled using WREN, writes to memory are
controlled by the Status register. As described above,
writes to the status register are performed using the
Rev. 1.1
Dec. 2010
Figure 8. WRSR Bus Configuration (WREN not shown)
Figure 7. RDSR Bus Configuration
Figure 6. WRDI Bus Configuration
WRSR – Write Status Register
The WRSR command allows the user to select
certain write protection features by writing a byte to
the Status register. Prior to issuing a WRSR
command, the /WP pin must be high or inactive. Note
that on the FM25W64, /WP only prevents writing to
the Status register, not the memory array. Prior to
sending the WRSR command, the user must send a
WREN command to enable writes. Note that
executing a WRSR command is a write operation and
therefore clears the Write Enable Latch. The bus
configuration of RDSR and WRSR in the timing
diagrams below.
WRSR command and subject to the /WP pin. The
Status Register is organized as follows.
Table 2. Status Register
Bits 0 and 4-6 are fixed at 0 and cannot be modified.
Note that bit 0 (Ready in EEPROMs) is unnecessary
Bit
Name
WPEN
7
6
0
5
0
4
0
BP1
3
BP0
2
WEL
1
6 of 13
0
0