S-24C01A Seiko Instruments Inc, S-24C01A Datasheet - Page 8

• Manufacturer Part Number: S-24C01A
• Description: CMOS 2-WIRE SERIAL EEPROM
• Manufacturer: Seiko Instruments Inc

CMOS 2-WIRED SERIAL EEPROM
S-24C01A/02A/04A
8
4. Acknowledgment
5. Device Addressing
(EEPROM Input)
(EEPROM Output)
(Master Output)
system bus which receives the data during the 9th clock cycle outputs the acknowledgment signal
verifying the data reception.
When the EEPROM is rewriting, the device does not output the acknowledgment signal.
To perform data communications, the master device mounted on the system outputs the start condition
signal to the slave device.
read/write instruction code onto the SDA bus.
Upper 4 bits of the device address are called the "Device Code," and set to "1010." Successive 3 bits are called the
"Slave Address." It is used to select a device on the system bus, and compared to the predetermined address value
at the address input pin (A2, A1, or A0).
When the comparison results match, the slave device outputs the acknowledgment signal during the 9th clock
cycle
In the S-24C04A, "A0" does not exist in the slave addresses. So, "A0" becomes "P0." "P0" is a page address bit and
is equivalent to an additional uppermost bit of the word address. Accordingly, when P0="0," the former half area
corresponding to 2 kbits (addresses from 000h to 0FFh) in the entire memory are selected; when P0="1," the latter
half area corresponding to 2 kbits (addresses from 100h to 1FFh) in all areas of the memory are selected.
The unit of data transmission is 8 bits. By turning the SDA line "L," the slave device mounted on the
SDA
SCL
SDA
.
S-24C04A
S-24C01A
S-24C02A
Start
Condition
Next, the master device outputs 7-bit length device address and a 1-bit length
Figure 8 Acknowledgment Output Timing
MSB
MSB
1
1
1
1
Device Code
Device Code
Figure 9 Device Address
0
0
0
Seiko Instruments Inc.
1
1
1
0
0
0
A2
A2
A2
Slave
Address
Slave Address
8
A1
A1
A1
Page
Address
t
P0
AA
Acknow-
ledgment
Output
A0
A0
9
LSB
R/W
R/W
R/W
LSB
t
DH
Rev. 2.2
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