MT28F008B5 Micron Technology, MT28F008B5 Datasheet - Page 4

• Manufacturer Part Number: MT28F008B5
• Description: (MT28F008B5 / MT28F800B5) FLASH MEMORY
• Manufacturer: Micron Technology

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DataSheet
PIN DESCRIPTIONS
8Mb Smart 5 Boot Block Flash Memory
MT28F800B5_3.fm - Rev. 3, Pub. 8/2002
44-PIN SOP
4
11, 10, 9, 8,
NUMBERS
42, 41, 40,
39, 38, 37,
36, 35, 34,
15, 17, 19,
21, 24, 26,
16, 18, 20,
22, 25, 27,
7, 6, 5, 4,
U
28, 30
13, 32
.com
3, 2
43
12
44
14
33
31
29
23
–
1
–
25-28, 32-35
15, 14, 8, 7,
NUMBERS
21, 20, 19,
18, 17, 16,
36, 6, 5, 4,
3, 2, 1, 40,
40-PIN
13, 37
30, 31
23, 39
29, 38
TSOP
12
22
10
24
11
9
–
–
–
8, 7, 6, 5, 4,
NUMBERS
20, 19, 18,
3, 2, 1, 48,
29, 31, 33,
35, 38, 40,
30, 32, 34,
36, 39, 41,
23,22, 21,
9, 10, 15
48-PIN
25, 24,
17, 16
42, 44
27, 46
TSOP
11
14
26
12
28
47
45
43
13
37
DQ0–DQ7
SYMBOL
A0–A18/
BYTE#
DQ15/
DQ8–
DQ14
(A19)
(A-1)
WE#
WP#
OE#
CE#
RP#
V
V
V
NC
CC
PP
SS
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SMART 5 BOOT BLOCK FLASH MEMORY
Output
Output
Output
Supply
Supply
Supply
Input/
Input/
Input/
TYPE
Input
Input
Input
Input
Input
Input
Input
–
Write Enable: Determines if a given cycle is a WRITE cycle.
If WE# is LOW, the cycle is either a WRITE to the command
execution logic (CEL) or to the memory array.
Write Protect: Unlocks the boot block when HIGH if V
V
not affect WRITE or ERASE operation on other blocks.
Chip Enable: Activates the device when LOW. When CE# is
HIGH, the device is disabled and goes into standby power
mode.
Reset/Power-Down: When LOW, RP# clears the status
register, sets the internal state machine (ISM) to the array
read mode and places the device in deep power-down
mode. All inputs, including CE#, are “Don’t Care,” and all
outputs are High-Z. RP# unlocks the boot block and
overrides the condition of WP# when at V
held at V
Output Enable: Enables data output buffers when LOW.
When OE# is HIGH, the output buffers are disabled.
Byte Enable: If BYTE# = HIGH, the upper byte is active
through DQ8–DQ15. If BYTE# = LOW, DQ8–DQ14 are High-
Z, and all data is accessed through DQ0–DQ7. DQ15/(A - 1)
becomes the least significant address input.
Address Inputs: Select a unique 16-bit word or 8-bit byte.
The DQ15/(A - 1) input becomes the lowest order address
when BYTE# = LOW (MT28F800B5) to allow for a selection
of an 8-bit byte from the 1,048,576 available.
Data I/O: MSB of data when BYTE# = HIGH.
during READ or WRITE operation.
Data I/Os: Data output pins during any READ operation or
data input pins during a WRITE. These pins are used to
input commands to the CEL.
Data I/Os: Data output pins during any READ operation or
data input pins during a WRITE when BYTE# = HIGH. These
pins are High-Z when BYTE# is LOW.
Write/Erase Supply Voltage: From a WRITE or ERASE
CONFIRM until completion of the WRITE or ERASE, VPP
must be at 5V. VPP = “Don’t Care” during all other
operations.
Power Supply: +5V ±10%.
Ground.
No Connect: These pins may be driven or left unconnected.
Address Input: LSB of address input when BYTE# = LOW
PPH
(5V) and RP# = V
4
Micron Technology, Inc. Reserves the right to change products or specifications without notice.
IH
during all other modes of operation.
IH
DESCRIPTION
during a WRITE or ERASE. Does
HH
©2002, Micron Technology Inc.
; RP# must be
8Mb
PP
=