MT58L64V36P Micron Semiconductor, MT58L64V36P Datasheet - Page 16

• Manufacturer Part Number: MT58L64V36P
• Description: (MT58LxxxxP) 2Mb SRAM
• Manufacturer: Micron Semiconductor

NOT RECOMENDED FOR NEW DESIGNS
GW#, BWE#,
BWa#-BWd#
READ TIMING PARAMETERS
NOTE: 1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L128L18P_C.p65 – Rev. C, Pub. 11/02
SYMBOL
t
f
t
t
t
t
t
t
t
t
t
ADDRESS
KC
KH
KQ
KQX
KQLZ
KQHZ
OEQ
OELZ
OEHZ
KF
KL
(NOTE 2)
ADSP#
ADSC#
ADV#
OE#
CLK
CE#
Q
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When CE#
3. Timing is shown assuming that the device was not enabled before entering into this sequence. OE# does not cause Q to
4. Outputs are disabled within one clock cycle after deselect.
is HIGH, CE2# is HIGH and CE2 is LOW.
be driven until after the following clock rising edge.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
5.0
1.6
1.6
1.0
0
0
-5
200
3.5
3.5
3.5
3.0
t ADSS
t AS
t CES
A1
6.0
1.7
1.7
1.5
1.5
t ADSH
t AH
t CEH
0
t KH
(NOTE 3)
High-Z
t KC
-6
t WS
166
t KL
3.5
3.5
3.5
3.5
Single READ
t KQLZ
t WH
t KQ
7.5
1.9
1.9
1.5
1.5
0
-7.5
t ADSS
133
4.0
4.0
4.0
4.0
A2
Q(A1)
t ADSH
t OEHZ
3.2
3.2
1.5
1.5
10
0
t AAS
-10
100
5.0
5.0
5.0
4.5
t AAH
t OELZ
t OEQ
READ TIMING
(NOTE 1)
MHz
Q(A2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t KQX
t KQ
16
Q(A2 + 1)
PIPELINED, SCD SYNCBURST SRAM
ADV#
suspends
burst.
SYMBOL
t
t
t
t
t
t
t
t
t
t
AS
ADSS
AAS
WS
CES
AH
ADSH
AAH
WH
CEH
2Mb: 128K x 18, 64K x 32/36
Q(A2 + 2)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
BURST READ
-5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
Q(A2 + 3)
-6
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
A3
Q(A2)
Burst continued with
new base address.
-7.5
Burst wraps around
to its initial state.
DON’T CARE
Q(A2 + 1)
©2002, Micron Technology, Inc.
2.2
2.2
2.2
2.2
2.2
0.5
0.5
0.5
0.5
0.5
t KQHZ
Deselect
cycle.
(NOTE 4)
-10
UNDEFINED
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns