MT9046 Zarlink Semiconductor, MT9046 Datasheet - Page 16

• Manufacturer Part Number: MT9046
• Description: T1/E1 System Synchronizer with Holdover
• Manufacturer: Zarlink Semiconductor

Phase Lock Time
This is the time it takes the synchronizer to phase lock to the input signal. Phase lock occurs when the input signal
and output signal are not changing in phase with respect to each other (not including jitter).
Lock time is very difficult to determine because it is affected by many factors which include:
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•
•
•
Although a short lock time is desirable, it is not always possible to achieve due to other synchronizer requirements.
For instance, better jitter transfer performance is achieved with a lower frequency loop filter which increases lock
time. And better (smaller) phase slope performance (limiter) results in longer lock times. The MT9046 loop filter and
limiter were optimized to meet the AT&T TR62411 jitter transfer and phase slope requirements. Consequently,
phase lock time, which is not a standards requirement, may be longer than in other applications. See AC Electrical
Characteristics - Performance for Maximum Phase Lock TIme.
MT9046 provides a fast lock pin (FLOCK), which, when set high enables the PLL to lock to an incoming reference
within approximately 500 ms.
Legend:
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/
MTIE
Refer to Control State Diagram for state changes to and from Auto-Holdover State
MS2
initial input to output phase difference
initial input to output frequency difference
synchronizer loop filter
synchronizer limiter
0
0
0
0
0
1
State change occurs with TIE Corrector Circuit
No Change
Not Valid
MS1
Input Controls
0
0
0
1
1
0
Description
RSEL
X
0
0
1
0
1
PCCi
X
X
X
X
0
1
Table 4 - Control State Table
Freerun
S0
S1
S1
S2
Zarlink Semiconductor Inc.
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/
/
MT9046
16
S2 MTIE
Normal
(PRI)
S1H
S2H
S1
S0
-
-
S1 MTIE
S1 MTIE
Normal
(SEC)
S2H
S2
S0
State
-
/
Holdover
S1 MTIE
S2 MTIE
(PRI)
S1H
S1
S0
-
/
Data Sheet
Holdover
S1 MTIE
S1 MTIE
S2 MTIE
(SEC)
S2H
S0
/
-