MT9075A Mitel Networks Corporation, MT9075A Datasheet - Page 44

• Manufacturer Part Number: MT9075A
• Description: E1 Single Chip Transceiver
• Manufacturer: Mitel Networks Corporation

MT9075A
4-172
7 - 4 RMA1-4 Receive
1 - 0
Bit
3
2
Table 37 - Receive Multiframe Alignment Signal
X2, X3
Name
X1
Y
(Page 03H, Address 14H)
Bits One to Four. These bits are
received on the PCM 30 2048 kbit/
sec. link in bit positions one to four
of time slot 16 of frame zero of
every signalling multiframe. These
bit should be 0000 for proper
signalling multiframe alignment.
Receive Spare Bit X1. This bit is
received on the PCM 30 2048 kbit/
sec. link in bit position five of time
slot 16 of frame zero of every
signalling multiframe.
Receive Y-bit. This bit is received
on the PCM 30 2048 kbit/sec. link in
bit position six of time slot 16 of
frame zero of every signalling
multiframe. The Y bit may indicate
loss of multiframe alignment at the
remote end (1 -loss of multiframe
alignment; 0 - multiframe alignment
acquired).
Receive Spare Bits X2 and X3.
These bits are received on the PCM
30 2048 kbit/sec. link in bit positions
seven and eight respectively, of
time slot 16 of frame zero of every
signalling multiframe.
Functional Description
Multiframe
Alignment
3-0
Bit
7
6
5
4
Table 38 - Most Significant Phase Status Word
RSLPD Receive Slip Direction. If one,
RxEBC
RSLIP
Name
AUXP
CEFS
11-8
(Page 03H, Address 15H)
Receive Slip. A change of state
(i.e., 1-to-0 or 0-to-1) indicates that
a receive controlled frame slip has
occurred.
indicates that the last received
frame slip resulted in a repeated
frame, i.e., system clock is faster
than
indicates that the last received
frame slip resulted in a lost frame,
i.e., system clock is slower than
network clock. Updated on an
RSLIP occurrence basis.
Auxiliary Pattern. This bit will go
high when a continuous 101010...
bit stream (Auxiliary Pattern) is
received on the PCM 30 link for a
period of at least 512 bits. If zero,
auxiliary
received.
decoded in the presence of a bit
error rate of as much as 10
Consecutively
Alignment Signal. This bit goes
high when the last two frame
alignment signals were received in
error. This bit will be low when at
least one of the last two frame
alignment signals is without error.
Receive Eighth Bit Count. The
four most significant bit of a counter
that indicates the number of one
eighth bit times there are between
the
receive frame pulse (RxFP).
Preliminary Information
ST-BUS
Functional Description
network
pattern
This
frame
clock.
Errored
pattern
is
pulse
not
If
-3
will
.
Frame
being
zero,
and
be