MT90871 Zarlink Semiconductor, MT90871 Datasheet - Page 7

• Manufacturer Part Number: MT90871
• Description: Flexible 8K Digital Switch (F8KDX)
• Manufacturer: Zarlink Semiconductor

Data Sheet
Pin Description Table (continued)
ODE
BORS
LORS
NC
IC
Name
B9
G2
H13
P9, P11
C1, D1, C11, C13,
M7, M8, N8, P8
Coordinates
Package
Output Drive Enable (5V Tolerant, Internal pull-up).
An asynchronous input providing Output Enable control to the BSTo0-15,
LSTo0-15, BCSTo0-1 and LCSTo0-1 outputs.
When LOW, the BSTo0-15 and LSTo0-15 outputs are driven high or high
impedance (dependent on the BORS and LORS pin settings respectively)
and the outputs BCSTo0-1 and LCSTo0-1 are driven low.
When HIGH, the outputs BSTo0-15, LSTo0-15, BCSTo0-1 and LCSTo0-1
are enabled.
Backplane Output Reset State (5V Tolerant, Internal pull-down).
Asynchronous input. When LOW, the device will initialize with the BSTo0-
15 outputs driven high, and the BCSTo0-1 outputs driven low. Following
initialization, the Backplane stream outputs are always active and a high
impedance state, if required on a per-channel basis, may be implemented
with external buffers controlled by outputs BCSTo0-1.
When the input is HIGH, the device will initialize with the BSTo0-15 outputs
at high impedance and the BCSTo0-1 outputs are driven low. Following
initialization, the Backplane stream outputs may be set active or high
impedance using the ODE pin or, on a per-channel basis, with the BE bit in
Backplane Connection Memory.
Backplane Output Reset State (5V Tolerant, Internal pull-down).
Asynchronous input. When LOW, the device will initialize with the LSTo0-
15 outputs driven high, and the LCSTo0-1 outputs driven low. Following
initialization, the Backplane stream outputs are always active and a high
impedance state, if required on a per-channel basis, may be implemented
with external buffers controlled by outputs LCSTo0-1.
When the input is HIGH, the device will initialize with the LSTo0-15 outputs
at high impedance and the LCSTo0-1 outputs are driven low. Following
initialization, the Backplane stream outputs may be set active or high
impedance using the ODE pin or, on a per-channel basis, with the LE bit in
Backplane Connection Memory.
No Connect. These ball-pads MUST remain unconnected.
Internal Connect
These inputs MUST be held at logic ‘LOW’.
Zarlink Semiconductor Inc.
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Description
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