MT9V012 Micron, MT9V012 Datasheet - Page 39
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MT9V012
Manufacturer Part Number
MT9V012
Description
1/6-Inch VGA CMOS Digital Image Sensor
Manufacturer
Micron
Datasheet
1.MT9V012.pdf
(53 pages)
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Stage-by-Stage Transfer Functions
V
Gain Settings: G1, G2, G3
Offset Voltage: V
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
Let V
The output voltage of ASC 1st stage is:
The output voltage of ASC 2nd stage is:
The output voltage of ADC Sample-and-Hold stage is:
and the ADC output code is:
From (1) to (4), the ADC output code can also be written as:
The ADC reference voltage V
where
using default register values:
and
using default register values:
so
using default register values
REFD
PIX
be the input of the signal path:
OFFSET
where:
Transfer functions proceed, stage by stage, as described below:
Where G1, G2, and G3 are the gain settings, V
and V
but is not applied to V
described below.
The V
The gains for green1, blue, red, and green2 pixels are set by registers Reg0x2B, Reg0x2C,
Reg0x2D, and Reg0x2E, respectively. Gain can also be set globally by Reg0x2F. The ana-
log gain is set by bits [8:0] of the corresponding register as follows:
Digital gain is set by bits [11:9] of the same registers.
The offset voltage provides a constant offset to the ADC to fully utilize the ADC input
dynamic range. The offset voltages for green1, blue, red, and green2 pixels are manually
set by registers Reg0x61, Reg0x62, Reg0x63, and Reg0x64, respectively. Note that the off-
set voltages can also be set automatically by the black level calibration loop.
For a given color, the offset voltage, V
REFD I
G1 = bit[7] + 1
G2 = bit[6:0] / 32
G3 = bit[8] + 1
s:
REFD
REFD
is the reference voltage of the ADC. The gain setting G3 is applied to the signal
parameters are as follows:
V
“offset_sign” is determined by bit[8] as:
if bit[8] = 0, offset_sign = +1
if bit[8] = 1, offset_sign = -1
“offset_code” is the decimal value of bit[7:0]
OFFSET
V
V
V
V
V
V
V
MT9V012 - 1/6-Inch VGA CMOS Digital Image Sensor
REFD
REF
REF
REF
REF
REFD
REFD
OFFSET
= 0.250V * offset_gain * offset_sign * offset_code[7:0]/255
_
_
_
_
HI
HI
LO
LO
= V
= 55.56mV * (Reg0x41[7:4] - Reg0x41[3:0] + 12)
= 2.000 - 1.000 = 1.000V
= 55.56mV * (Reg0x41[7:4] + 23)
= 55.56mV * (13 + 23) = 2.000V
= 55.56mV * (Reg0x41[3:0] + 11)
= 55.56mV * (7 +11) = 1.000V
REF
. The parameters V
39
_
HI
V
V1 = -1 * G1 *V
V2 = -1 * G2 * V1
V3 = 2 * G3 * V2 - V
ADC output code = 511 * (1 + (V3 / Vr
ADC code = (1022/V
(Voffset/(2 * G3))]
PIX
- V
= pixel output voltage = signal path input voltage,
REF
OFFSET
_
Micron Technology, Inc., reserves the right to change products or specifications without notice.
LO
, is determined by:
OFFSET
PIX
REFD
REFD
REFD
, G1, G2, G3, and V
is the offset (calibration) voltage,
) * [G1 * G2 * G3 * V
+ V
OFFSET
©2004 Micron Technology, Inc. All rights reserved.
Feature Description
EFD
))
OFFSET
PIX
Preliminary
+
are
(10)
(11)
(12)
(13)
(14)
(15)
(6)
(7)
(8)
(9)
(1)
(2)
(3)
(4)
(5)
‡