MC14510B Motorola, MC14510B Datasheet - Page 6

• Manufacturer Part Number: MC14510B
• Description: BCD Up/Down Counter
• Manufacturer: Motorola

www.DataSheet4U.com
INPUTS
on these inputs is loaded into the counter when PE is taken
high.
stages. Usually connected to Carry Out of the previous
stage. While high, clock is inhibited.
cremented, depending on the direction of count, on the posi-
tive transition of this signal.
OUTPUTS
data is present on these outputs with Q1 corresponding to
the least significant bit.
pin is usually connected to Carry In of the next stage. This
Note: The Least Significant Digit (L.S.D.) counts from a preset value once Preset Enable (PE) goes low. The Most Significant
Digit (M.S.D.) does not change while C in is high. When the count of the L.S.D. reaches 0 (count down mode) or reaches 9
(count up mode), C out goes low for one complete clock cycle, thus allowing the next counter to decrement/increment one
count. The L.S.D. now counts through another cycle (10 clock pulses) and the above cycle is repeated.
MC14510B
356
P1, P2, P3, P4, Preset Inputs (Pins 4, 12, 13, 3) — Data
Carry In, (Pin 5) — Active–low input used when cascading
Clock, (Pin 15) — BCD data is incremented or de-
Q1, Q2, Q3, Q4, BCD outputs (Pins 6, 11, 14, 2) — BCD
Carry Out, (Pin 7) — Used when cascading stages, this
CLOCK
+ V DD
0 = COUNT
1 = PRESET
1 = UP
0 = DOWN
PRESET
ENABLE
OPEN = COUNT
RESET
Figure 3. Presettable Cascaded 8–Bit Up/Down Counter
PE
C in
CLOCK
U/D
R
P1
Q1
Q1
P1
THUMBWHEEL SWITCHES
P2
(OPEN FOR “0”)
Q2
Q2
P2
MC14510B
L.S.D.
+ V DD
P3
PIN DESCRIPTIONS
Q3
Q3
P3
P4
Q4
Q4
P4
C out
synchronous output is active low and may also be used to
indicate terminal count.
CONTROLS
on the Preset Inputs. This pin is active high and will inhibit the
clock when high.
to a low state. This pin is active high and will inhibit the clock
when high.
for up count, low for down count.
SUPPLY PINS
usually connected to ground.
nected to a positive supply voltage ranging from 3.0 Vdc to
18.0 Vdc.
PE, Preset Enable (Pin 1) — Asynchronously loads data
R, Reset, (Pin 9) — Asynchronously resets the Q outputs
Up/Down, (Pin 10) — Controls the direction of count: high
V SS , Negative Supply Voltage, (Pin 8) — This pin is
V DD , Positive Supply Voltage, (Pin 16) — This pin is con-
PE
C in
CLOCK
U/D
R
P5
Q5
Q1
P1
RESISTORS = 10 k
P6
Q6
Q2
P2
MC14510B
M.S.D.
+ V DD
P7
Q7
Q3
P3
MOTOROLA CMOS LOGIC DATA
P8
Q8
Q4
P4
C out
TERMINAL
COUNT
INDICATOR