2N3958 Micross, 2N3958 Datasheet
2N3958
Manufacturer Part Number
2N3958
Description
Low Noise
Manufacturer
Micross
Datasheet
1.2N3958.pdf
(1 pages)
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ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
V
The 2N3958 family are matched JFET pairs for
differential amplifiers. The 2N3958 family of general
purpose JFETs is characterized for low and medium
frequency differential amplifiers requiring low offset
voltage, drift, noise and capacitance
The 2N3958 family also exhibits low capacitance - 6pF
max and a spot noise figure of -0.5dB max. The part
offers a superior tracking ability.
The hermetically sealed TO-71 and TO-78 packages
are well suited for high reliability and harsh environment
applications.
(See Packaging Information).
2N3958 Applications:
Available Packages:
2N3958 in TO-71 / TO-78
2N3958 available as bare die
Please contact
|I
|Y
GS
DSS1‐2
SYMBOL
FS1‐2
|Y
V
(off) or V
BV
BV
CMR
CMR
GS
‐I
Y
C
Y
I
C
C
Y
OS1‐2
Y
NF
‐I
‐I
‐I
DSS
e
GSS
OSS
fSS
(on)
RSS
OS
ISS
DD
GGO
GSS
fS
G
G
G
n
/ Y
/ I
DSS
|
FS
Wideband Differential Amps
High Input Impedance Amplifiers
Click To Buy
|
|
p
The 2N3958 is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET
Micross
COMMON MODE REJECTION
Mismatch at Full Conduction
Gate‐To‐Gate Breakdown
OUTPUT CONDUCTANCE
TRANSCONDUCTANCE
‐20 log | V
‐20 log | V
Breakdown Voltage
High Temperature
At Full Conduction
CHARACTERISTICS
Typical Operation
DRAIN CURRENT
Operating Range
Reverse Transfer
for full package and die dimensions
Pinchoff voltage
Full Conduction
Full Conduction
GATE VOLTAGE
GATE CURRENT
Full Conduction
CAPACITANCE
Drain‐to‐Drain
Reduced V
Differential
Mismatch
Operating
Operating
Voltage
NOISE
Figure
Input
GS1‐2
GS1‐2
/ V
/ V
DG
DS
DS
|
|
MIN.
1000
500
0.5
0.5
60
60
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
1
MONOLITHIC DUAL
N-CHANNEL JFET
TO-71 / TO-78 (Bottom View)
2000
FEATURES
LOW DRIFT
LOW LEAKAGE
LOW NOISE
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
Maximum Voltage and Current for Each Transistor – Note 1
‐V
‐V
‐I
Maximum Power Dissipation
Device Dissipation @ Free Air – Total 400mW @ 25°C
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
SYMBOL
| V
| V
TYP.
0.01
700
100
0.6
0.1
0.1
20
75
G(f)
‐‐
‐‐
2
1
2
‐‐
‐‐
5
‐‐
‐‐
‐‐
‐‐
‐‐
‐‐
2N3958
GSS
DSO
GS1‐2
GS1‐2
/ T| max.
| max.
MAX.
3000
1000
100
4.5
0.1
0.5
50
50
15
‐‐
‐‐
3
5
5
4
‐‐
5
1
‐‐
‐‐
6
2
‐‐
Gate Voltage to Drain or Source
Drain to Source Voltage
Gate Forward Current
CHARACTERISTICS
OFFSET VOLTAGE
TEMPERATURE
DRIFT VS.
nV/√Hz
UNITS
µmho
µmho
µmho
µmho
µmho
mA
pA
nA
pA
pA
dB
dB
dB
pF
pF
pF
%
%
V
V
V
V
Micross Components Europe
Tel: +44 1603 788967
Email:
Web:
http://www.micross.com/distribution
chipcomponents@micross.com
I
V
V
V
|∆ V
I
e
VALUE UNITS
T
G
DS
n
100
A
= 20pA TYP.
= 10nV/√Hz TYP.
25
V
= +125°C
=20V I
V
V
DG
DS
G
DG
∆V
GS1‐2
DS
∆V
= 1nA I
= 20V V
= 20V I
= 20V V
= 20V V
V
f= 100Hz NBW= 6Hz
V
V
V
V
V
DS
V
V
DS
V
DG
DG
/∆T|= 5µV/°C max.
DG
DG
DS
DG
DS
DG
DS
DG
= 10 to 20V I
µV/°C
= 5 to 10V I
= 20V I
D
= 20V I
= 20V I
= 20V V
=20V I
= 20V I
= 20V V
= 10V I
= 0 I
=200µA f=10Hz NBW=1Hz
mV
= 20V V
CONDITIONS
‐65°C to +200°C
+150°C
60V
60V
50mA
GS
D
GS
= 0V R
= 200µA
GS
= 0V f= 1MHz
CONDITIONS
V
T
V
D
= 0V f = 1kHz
A
DG
DG
= 0 I
=‐55°C to +125°C
D
D
=20V, I
=20V, I
D
D
= 200µA
= 200µA
= 200µA
= 200µA
D
D
D
GS
GS
D
D
=1µA
= 1nA
DS
=200µA
=200µA
=200µA
= 0V
= 0V
G
= 0
= 10MΩ
D
D
=200µA
=200µA
S
= 0