ISL1219 Intersil Corporation, ISL1219 Datasheet - Page 5

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ISL1219

Manufacturer Part Number
ISL1219
Description
Real Time Clock/Calendar
Manufacturer
Intersil Corporation
Datasheet

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I
NOTES:
SDA vs. SCL Timing
Symbol Table
2
t
Cb
Rpu
2. IRQ and F
3. LPMODE = 0 (default).
4. In order to ensure proper timekeeping, the V
5. Typical values are for T = 25°C and 3.3V supply voltage.
6. V
7. These are I
8. A write to register 08h should only be done if V
F
SYMBOL
C Interface Specifications
WAVEFORM
(OUTPUT TIMING)
SUP
(INPUT TIMING)
= V
DD
SDA and SCL Fall Time
Capacitive Loading of SDA or SCL
SDA and SCL Bus Pull-up Resistor
Off-chip
OUT
2
C specific parameters and are not directly tested, however they are used during device testing to validate device specification.
SDA
SCL
if in V
SDA
and EVDET Inactive.
t
SU:STA
DD
INPUTS
Must be steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes Allowed
N/A
PARAMETER
Mode, V
5
SUP
t
HD:STA
Test Conditions: V
= V
BAT
t
F
OUTPUTS
Will be steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not Known
Center Line is
High Impedance
if in V
t
DD SR-
SU:DAT
DD
From 70% to 30% of V
Total on-chip and off-chip
Maximum is determined by t
For Cb = 400pF, max is about
2~2.5kΩ. For Cb = 40pF, max is about
15~20kΩ
BAT
> V
specification must be followed.
DD
Mode.
BAT
t
= +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified.
, otherwise the device will be unable to communicate using I
HIGH
TEST CONDITIONS
ISL1219
t
LOW
DD.
t
HD:DAT
R
and t
F
.
t
R
0.1 x Cb
20 +
MIN
t
10
AA
1
t
DH
(Note 4)
TYP
MAX
400
300
t
BUF
2
C.
t
SU:STO
UNITS
kΩ
pF
ns
August 14, 2006
NOTES
FN6314.1
7
7
7

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