ISL5929 Intersil Corporation, ISL5929 Datasheet - Page 4

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ISL5929

Manufacturer Part Number
ISL5929
Description
CommLink TM High Speed D/A Converter
Manufacturer
Intersil Corporation
Datasheet

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Pin Descriptions
1-8, 29-48
11, 19, 26
PIN NO.
13, 24
14, 23
12, 25
15, 22
16, 21
28
27
10
20
17
18
9
ID13-ID0, QD13-QD0 Digital data input ports. Bit 13 is most significant bit (MSB) and bit 0 is the least significant bit (LSB).
ICOMP, QCOMP
IOUTA, QOUTA
IOUTB, QOUTB
PIN NAME
REFLO
FSADJ
SLEEP
REFIO
AGND
DGND
A
D
CLK
NC
VDD
VDD
4
Analog ground.
Analog supply (+2.7V to +3.6V).
Clock Iinput.
Connect to digital ground.
Digital supply (+2.7V to +3.6V).
Full scale current adjust. Use a resistor to ground to adjust full scale output current. Full scale output
current = 32 x V
Not internally connected. Recommend no connect.
Compensation pin for internal bias generation. Each pin should be individually decoupled to AGND with
a 0.1 µ F capacitor.
Current outputs of the device. Full scale output current is achieved when all input bits are set to binary 1.
Complementary current outputs of the device. Full scale output current is achieved on the complementary
outputs when all input bits are set to binary 0.
Reference voltage input if Internal reference is disabled. The internal reference is not intended to drive an
external load. Use 0.1 µ F cap to ground when internal reference is enabled.
Connect to analog ground to enable internal 1.2V reference or connect to AV
Connect to digital ground or leave floating for normal operation. Connect to DV
FSADJ
/R
SET
ISL5929
.
PIN DESCRIPTION
DD
DD
to disable internal reference.
for sleep mode.

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