ISL6210 Intersil Corporation, ISL6210 Datasheet
ISL6210
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ISL6210 Summary of contents
Page 1
... ISL6210CRZ 62 10CRZ -10 to +100 16 Ld 4x4 QFN L16.4x4 ISL6210CRZ-T 62 10CRZ -10 to +100 16 Ld 4x4 QFN L16.4x4 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... LGATE1 2 11 BOOT1 GND 10 PVCC 3 BOOT2 FCCM 4 9 UGATE2 ISL6210 PVCC SHOOT- THROUGH PROTECTION PVCC PGND PVCC SHOOT- THROUGH PROTECTION PGND THE PAD ON THE BOTTOM SIDE OF THE QFN PACKAGE PAD MUST BE SOLDERED TO THE CIRCUIT’S GROUND. BOOT1 UGATE1 PHASE1 ...
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... Typical Application - Multiphase Converter Using ISL6210 Gate Drivers COMP FB V VSEN CC ISEN1 PWM1 PGOOD EN PWM2 ISEN2 MAIN CONTROL ISL62xx VID ISEN3 FCCM PWM3 PWM4 GND ISEN4 EN 3 ISL6210 BOOT1 +5V UGATE1 VCC PHASE1 FCCM LGATE1 EN DUAL PVCC DRIVER ISL6210 +5V BOOT2 UGATE2 PWM1 ...
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... LGATE Fall Time (Note 3) UGATE Turn-Off Propagation Delay LGATE Turn-Off Propagation Delay UGATE Turn-On Propagation Delay LGATE Turn-On Propagation Delay 4 ISL6210 Thermal Information Thermal Resistance (Notes 1 and 2) QFN Package . . . . . . . . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150° -0. (DC) Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C -0. (< ...
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... PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the controller. N/A PAD Connect this pad to the power ground plane (GND) via thermally enhanced connection. 5 ISL6210 = -10°C to +100°C, Unless Otherwise Noted (Continued) A SYMBOL TEST CONDITIONS ...
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... DS(ON) MOSFET can cause gross current measurement inaccuracies. Three-State PWM Input A unique feature of the ISL6210 and other Intersil drivers is the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window for a set holdoff time, the output drivers are disabled and both MOSFET gates are pulled and held low ...
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... FCCM = RESISTOR to VCC or GND GATE A ADAPTIVE PROTECTION WITH DELAY 50ns DELAY 1V FIGURE 2. PROGRAMMABLE DEAD-TIME 7 ISL6210 FIGURE 3. ISL6210 PROGRAMMABLE DEAD-TIME vs The equation governing the dead-time seen in Figure 3 is GATE B expressed as: T DELAY ns The equation can be rewritten to solve for R follows: R DELAY Internal Bootstrap Diode This driver features an internal bootstrap diode ...
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... SW ⎝ ⎠ GS1 GS2 8 ISL6210 where the gate charge (Q particular gate to source voltage (V corresponding MOSFET data sheet; I quiescent current with no load at both drive outputs; N and N respectively. The I the driver without capacitive load and is typically negligible. The total gate drive power losses are dissipated among the resistive components along the transition path ...
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... FETs must be used, a Schottky diode is recommended across the lower MOSFET to clamp negative PHASE ring. 9 ISL6210 A good layout would help reduce the ringing on the phase and gate nodes significantly: • Avoid uses via for decoupling components across BOOT and PHASE pins and in between VCC and GND pins. The decoupling loop should be short. • ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 ISL6210 L16.4x4 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220-VGGC ISSUE C) ...