ISL6326 Intersil Corporation, ISL6326 Datasheet - Page 10

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ISL6326

Manufacturer Part Number
ISL6326
Description
4-Phase PWM Controller
Manufacturer
Intersil Corporation
Datasheet

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external resistor and precision internal voltage references.
The polarity of the offset is selected by connecting the
resistor to GND or VCC. For no offset, the OFS pin should
be left unterminated.
TCOMP - Temperature compensation scaling input. The
voltage sensed on the TM pin is utilized as the temperature
input to adjust ldroop and the overcurrent protection limit to
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is
needed with one resistor being connected from TCOMP to
VCC of the controller and another resistor being connected
from TCOMP to GND. Changing the ratio of the resistor
values will set the gain of the integrated thermal
compensation. When integrated temperature compensation
function is not used, connect TCOMP to GND.
IDROOP - IDROOP is the output pin of the sensed average
channel current which is proportional to the load current. In
the application which does not require loadline, this pin can
be connected to GND through a resistor to generate a
voltage signal, which is proportional the load current and the
resistor value. In the application which requires load line,
connect this pin to FB so that the sensed average current
will flow through the resistor between FB and VDIFF to
create a voltage drop which is proportional to load current.
Tie this pin to GND if not used.
TM - TM is an input pin for the VR temperature
measurement. Connect this pin through an NTC thermistor
to GND and a resistor to VCC of the controller. The voltage
at this pin is reverse proportional to the VR temperature.
ISL6326 monitors the VR temperature based on the voltage
at the TM pin and outputs VR_HOT and VR_FAN signals.
VR_HOT - VR_HOT is used as an indication of high VR
temperature. It is an open-drain logic output. It will be pulled
low if the measured VR temperature is less than a certain
level, and open when the measured VR temperature
reaches a certain level. A external pull-up resistor is needed.
VR_FAN - VR_FAN is an output pin with open-drain logic
output. It will be pulled low if the measured VR temperature
is less than a certain level, and open when the measured VR
temperature reaches a certain level. A external pull-up
resistor is needed.
10
ISL6326
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that the advantages of multiphase power conversion
are impossible to ignore. The technical challenges
associated with producing a single-phase converter which is
both cost-effective and thermally viable have forced a
change to the cost-saving approach of multiphase. The
ISL6326 controller helps reduce the complexity of
implementation by integrating vital functions and requiring
minimal output components. The block diagrams on pages
3, 4, and 5 provide top level views of multiphase power
conversion using the ISL6326 controller.
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter, each channel switches 1/3
cycle after the previous channel and 1/3 cycle before the
following channel. As a result, the three-phase converter has
a combined ripple frequency three times greater than the
ripple frequency of any one phase. In addition, the peak-to-
peak amplitude of the combined inductor currents is reduced
in proportion to the number of phases (Equations 1 and 2).
Increased ripple frequency and lower ripple amplitude mean
that the designer can use less per-channel inductance and
lower total output capacitance for any performance
specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
pulse is terminated 1/3 of a cycle after the PWM pulse of the
previous phase. The DC components of the inductor currents
combine to feed the load.
FIGURE 1. PWM AND INDUCTOR-CURRENT WAVEFORMS
PWM3, 5V/DIV
IL1 + IL2 + IL3, 7A/DIV
FOR 3-PHASE CONVERTER
IL3, 7A/DIV
PWM1, 5V/DIV
1µs/DIV
IL1, 7A/DIV
PWM2, 5V/DIV
IL2, 7A/DIV
April 21, 2006
FN9262.0

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