ISL653031EVAL1 Intersil Corporation, ISL653031EVAL1 Datasheet - Page 9

• Manufacturer Part Number: ISL653031EVAL1
• Description: Dual 5V Synchronous Buck Pulse-Width Modulator (PWM) Controller for DDRAM Memory VDDQ and VTT Termination
• Manufacturer: Intersil Corporation

One method that may be employed to bypass the internal
V
directly to the V
must remain unconnected. Caution must be exercised when
using this method as the V
soft-start of its own.
A second method would be to overdrive the internal
resistors. Figure 4 shows how to implement this method. The
external resistors used to overdrive the internal resistors
should be less than 2kΩ and have a tolerance of 1% or
better. This method still supplies a buffer between the
resistor network and any loading on the V
no loading on the V
and the reference voltage created by the resistor network
can be tied directly to V
Converter Shutdown
Pulling and holding the OCSET/SD pin below 0.8V will
shutdown both regulators. During this state, PGOOD will be
held LOW. Upon release of the OCSET/SD pin, the IC
enters into a soft start cycle which brings both outputs back
into regulation.
Voltage Monitoring
The ISL6530 offers a PGOOD signal that will communicate
whether the regulation of both V
±15% of regulation, the V2_SD pin is held low and the bias
voltage of the IC is above the POR level. If all the criteria
above are true, the PGOOD pin will be at a high impedence
level. When one or more of the criteria listed above are false,
the PGOOD pin will be held low.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET on-resistance, r
V
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
DDQ
TT
reference generation is to supply an external reference
to monitor the current. This method enhances the
R
R
A
B
FIGURE 4. V
V
DDQ
REF_IN
REF
TT
pin. When doing this the SENSE1 pin
REF
pin, then no buffering is necessary
REFERENCE OVERDRIVE
TT
.
regulator does not employ a
9
SENSE1
VREF_IN
VREF
DDQ
and V
ISL6530
+
-
REF
TO ERROR
AMPLIFIER
TT
are within
pin. If there is
DS(ON)
OCSET
, of
)
ISL6530
programs the overcurrent trip level (see Figure 1). An internal
40µA (typical) current sink develops a voltage across
R
the upper MOSFET of V
the voltage across R
a soft-start sequence.
Figure 5 illustrates the protection feature responding to an
over current event on V
condition is sensed across the upper MOSFET of the V
regulator. As a result, both regulators are quickly shutdown
and the internal soft-start function begins producing soft-
start ramps. The delay interval seen by the output is
equivalent to three soft-start cycles. The fourth internal soft-
start cycle initiates a normal soft-start ramp of the output, at
time T1. Both outputs are brought back into regulation by
time t2, as long as the overcurrent event has cleared.
Had the cause of the overcurrent still been present after the
delay interval, the overcurrent condition would be sensed
and both regulators would be shut down again for another
delay interval of three soft-start cycles. The resulting hiccup
mode style of protection would continue to repeat
indefinitely.
The overcurrent function will trip at a peak inductor current
(I
where I
typical). The OC trip point varies mainly due to the MOSFET
I
PEAK)
PEAK
OCSET
0V
FIGURE 5. OVERCURRENT PROTECTION RESPONSE
=
OCSET
determined by:
T0
that is referenced to V
I
---------------------------------------------------- -
OCSET
V
INTERNAL SOFT-START FUNCTION
DDQ
r
is the internal OCSET current source (40µA
DS ON
V
TT
x R
(
(2.5V)
DELAY INTERVAL
(1.25V)
OCSET
OCSET
)
DDQ
DDQ
, the overcurrent function initiates
. At time T0, an over current
(also referenced to V
TIME
IN
. When the voltage across
T1
IN
) exceeds
T2
DDQ