ISL6548 Intersil Corporation, ISL6548 Datasheet
ISL6548
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ISL6548 Summary of contents
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... Data Sheet ACPI Regulator/Controller for Dual Channel DDR Memory Systems The ISL6548 provides a complete ACPI compliant power solution for DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply V during S0/S1 and S3 states. During S0/S1 DDQ state, a fully integrated sink-source regulator generates an ...
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Block Diagram VDDQ P12V R GU EA4 DRIVE4 GMCH DUAL LDO R GL FB4 REFADJ4 P12V EA3 DRIVE3 FB3 P12V EA2 DRIVE2_U FB2 P12V DRIVE2_L 5VSBY S3# S5# FB P12V POR MONITOR AND CONTROL FAULT SOFTSTART & ENABLE A SOFTSTART ...
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... SLEEP STATE LOGIC PWM CONTROLLER TWO STAGE LINEAR CONTROLLER ISL6548 VTT LINEAR REGULATOR CONTROLLER 5VSBY 12V BOOT VIDPGD S5# OCSET S3# ISL6548 DRIVE4 UGATE FB4 PHASE REFADJ4 LGATE DRIVE3 DDR_VDDQ(x2) COMP FB3 R6 FB DRIVE2_U VREF_IN FB2 R8 DDR_VTT(x2) DRIVE2_L DDR_VTTSNS GND 5VDUAL ...
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... DC Gain Gain-Bandwidth Product Slew Rate CONTROL I/O (S3# and S5#) Low Level Input Threshold High Level Input Threshold 4 ISL6548 Thermal Information Thermal Resistance QFN Package (Notes Maximum Junction Temperature (Plastic Package 150° +6.0V Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s 300°C ...
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... TT_GMCH/CPU Thermal Shutdown Limit 5 ISL6548 SYMBOL TEST CONDITIONS I GATE I GATE Periodic load applied with 30% duty cycle and VTT_MAX 10ms period using ISL6548_6506EVAL1 evaluation board (see Application Note AN1123) Guaranteed By Design GBWP SR DRIVEn unloaded V = 770mV DRIVEn V = 830mV 10V FB DRIVEn S0 ...
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... Functional Pin Description 5VSBY (Pin 1) 5VSBY is the bias supply of the ISL6548 typically connected to the 5V standby rail of an ATX power supply. During S4/S5 sleep states the ISL6548 enters a reduced power mode and draws less than 1mA (I 5VSBY supply. The supply to 5VSBY should be locally bypassed using a 0.1µ ...
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... ISL6548 receives its bias voltage from the 5V Standby bus (5VSBY). Once the 5VSBY rail has exceeded the POR threshold, the ISL6548 will remain in an internal S5 state until both the SLP_S3 and SLP_S5 signal have transitioned high and the 12V POR threshold has been exceeded by the ...
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... V GMCH 0V V TT_GMCH/CPU 0V VIDPGD (3 SOFTSTART CYCLES Soft-Start Rise Time Dependent Upon Capacitor TT_DDR V FLOATING TT_DDR (3 SOFTSTART CYCLES FIGURE 1. ISL6548 TIMING DIAGRAM Pin REF_IN ...
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... If a fault occurs prior to the Fault Reset Counter reaching a count of 16384, then the Fault Reset Counter is set back to zero. The ISL6548 will immediately shut down when the Fault Counter reaches a count of 4 when the system is restarting from an S5 state into the active, or S0, state. The ISL6548 and the SLP_S3 signal transitions HIGH ...
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... The 16384 counts that are required to reset the Fault Reset Counter represent 8 soft-start cycles, as one soft-start cycle is 2048 clock cycles. This allows the ISL6548 to attempt at least one full soft-start sequence to restart the faulted regulators. When attempting to restart a faulted regulator, the ISL6548 will follow the preset start up sequencing ...
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... This allows the heat to move away from the IC and also ties the pad to the ground plane through a low impedance path. The switching components should be placed close to the ISL6548 first. Minimize the length of the connections between the input capacitors and the power switches IN by placing them nearby ...
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... ESR 2π The compensation network consists of the error amplifier (internal to the ISL6548) and the impedance networks Z and Z . The goal of the compensation network is to provide FB a closed loop transfer function with the highest 0dB crossing frequency (f ) and adequate phase margin. Phase margin ...
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... The output voltage for the internal V TT_DDR is set internal to the ISL6548 to track the V 50%. There is no need for external programming resistors. Component Selection Guidelines Output Capacitor Selection - PWM Buck Converter An output capacitor is required to filter the inductor current and supply the load transient current ...
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... ISL6548 and do not adequately model power loss due the reverse- recovery of the upper and lower MOSFET’s body diode. The gate-charge losses are dissipated in part by the ISL6548 and do not significantly heat the MOSFETs. However, large gate- charge increases the switching interval, t the MOSFET switching losses ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 ISL6548 L28.6x6 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VJJC ISSUE C) ...