ISL6610A Intersil Corporation, ISL6610A Datasheet
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ISL6610A
Related parts for ISL6610A
ISL6610A Summary of contents
Page 1
... N-Channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously. The ISL6610, ISL6610A features 4A typical sink current for the lower gate driver, enhancing the lower MOSFET gate hold-down capability during PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node ...
Page 2
... PROTECTION PVCC PGND R BOOT PVCC SHOOT- THROUGH PROTECTION PGND FOR ISL6610CR/10ACR, THE PAD ON THE BOTTOM SIDE OF PAD THE QFN PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND. ) AVAILABLE ONLY IN ISL6610A BOOT ISL6610, ISL6610A (16 LD QFN) TOP VIEW GND 1 12 UGATE1 ...
Page 3
... Typical Application - Multiphase Converter Using ISL6610 Gate Drivers COMP FB V VSEN CC ISEN1 PWM1 PGOOD EN PWM2 ISEN2 MAIN CONTROL ISL65xx VID ISEN3 FS/DIS PWM3 PWM4 GND ISEN4 3 ISL6610, ISL6610A BOOT1 +5V UGATE1 VCC PHASE1 LGATE1 +5V DUAL PVCC DRIVER ISL6610 +5V BOOT2 UGATE2 PWM1 PHASE2 NC2 PWM2 LGATE2 NC1 GND PGND ...
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... UGATE Rise Time LGATE Rise Time UGATE Fall Time LGATE Fall Time UGATE Turn-Off Propagation Delay LGATE Turn-Off Propagation Delay 4 ISL6610, ISL6610A Thermal Information Thermal Resistance (Typical) SOIC Package (Note QFN Package (Notes 2 and 3 -0. (DC) Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C -0. (< ...
Page 5
... Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR ceramic capacitor from this pin to GND PAD Connect this pad to the power ground plane (GND) via thermally enhanced connection. 5 ISL6610, ISL6610A = -40°C to +85°C, unless otherwise noted (Continued) A SYMBOL TEST CONDITIONS t Outputs Unloaded ...
Page 6
... MOSFET due to high dV/dt of the switching node. Tri-State PWM Input A unique feature of the ISL6610, ISL6610A is the adaptable ] tri-state PWM input. Once the PWM signal enters the FL shutdown window, either MOSFET previously conducting is turned off ...
Page 7
... IC beyond the maximum recommended operating junction temperature of +125°C. The maximum allowable IC power dissipation for 7 ISL6610, ISL6610A the SO14 package is approximately 1W at room temperature, while the power dissipation capacity in the QFN packages, with an exposed heat escape pad, is around 2W ...
Page 8
... NEGATIVE PHASE SPIKE 2 The selection of D -PAK, or D-PAK packaged MOSFETs much better match (for the reasons discussed) for the ISL6610A with a phase resistor, as shown in Figure 5. Low- 8 ISL6610, ISL6610A profile MOSFETs, such as Direct FETs and multi-SOURCE leads devices (SO-8, LFPAK, PowerPAK), have low parasitic ...
Page 9
... PCB capacitances are also not taken into account. These equations are provided for guidance purpose only. Therefore, the actual coupling effect should be examined using a very high impedance (10MΩ or greater) probe to ensure a safe design margin. 9 ISL6610, ISL6610A dV ⋅ V ------- GS_MILLER ...
Page 10
... Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) 10 ISL6610, ISL6610A L16.4x4 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220-VGGC ISSUE C) SYMBOL MIN 0. θ - NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 ISL6610, ISL6610A M14.15 (JEDEC MS-012-AB ISSUE C) 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC ...