ISL8022 Intersil, ISL8022 Datasheet - Page 4

• Manufacturer Part Number: ISL8022
• Description: Dual 2A/1.7A Low Quiescent Current 2.25MHz High Efficiency Synchronous Buck Regulator
• Manufacturer: Intersil

Ordering Information
NOTES:
Pin Description
PART NUMBER
(Notes 1, 2, 3)
ISL8022IRZ
ISL8022EVAL1Z Evaluation Board
1. Add “T” suffix for Tape and Reel. Please refer to
2. These Intersil Pb-free plastic packaged products employ
3. For Moisture Sensitivity Level (MSL), please see device
NUMBER
details on reel specifications.
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3
termination finish, which is RoHS compliant and compatible
with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements
of IPC/JEDEC J STD-020.
information page for ISL8022. For more information on MSL
please see techbrief TB363.
PIN
10
11
12
1
2
3
4
5
6
7
8
9
-
EXPOSED
SYMBOL
PGND1
PGND2
SYNC
VIN1
VIN2
EN1
EN2
PAD
FB1
LX1
LX2
FB2
PG
8022
MARKING
PART
The feedback network of the Channel 1 regulator. FB1 is the negative input to the transconductance
error amplifier. The output voltage is set by an external resistor divider connected to FB1. With a
properly selected divider, the output voltage can be set to any voltage between the power rail (reduced
by converter losses) and the 0.6V reference. There is an internal compensation to meet a typical
application. In addition, the regulator power-good and undervoltage protection circuitry use FB1 to
monitor the Channel 1 regulator output voltage.
Regulator Channel 1 enable pin. Enable the output, V
and discharge output capacitor when driven to low. Do not leave this pin floating.
1ms timer output. At power-up or EN_ HI, this output is a 1ms delayed Power-Good signal for both the
V
Input supply voltage for Channel 1. Connect 10µF ceramic capacitor to PGND1.
Switching node connection for Channel 1. Connect to one terminal of inductor for V
Negative supply for power stage 1.
Negative supply for power stage 2 and system ground.
Switching node connection for Channel 2. Connect to one terminal of inductor for V
Input supply voltage for Ch 2 and to provide logic bias. Make sure that V
ceramic capacitor to PGND2.
Mode Selection pin. Connect to logic high or input voltage VIN for PFM mode; connect to logic low or
ground for forced PWM mode. Connect to an external function generator for Synchronization. Negative
edge trigger. Do not leave this pin floating.
Regulator Channel 2 enable pin. Enable the output, V
and discharge output capacitor when driven to low. Do not leave this pin floating.
The feedback network of the Channel 2 regulator. FB2 is the negative input to the transconductance
error amplifier. The output voltage is set by an external resistor divider connected to FB2. With a
properly selected divider, the output voltage can be set to any voltage between the power rail (reduced
by converter losses) and the 0.6V reference. There is an internal compensation to meet a typical
application. In addition, the regulator power-good and undervoltage protection circuitry use FB2 to
monitor the Channel 2 regulator output voltage.
The exposed pad must be connected to the SGND pin for proper electrical performance. Add as much
vias as possible for optimal thermal performance.
OUT1
4
-40 to +85 12 Ld 4x3
RANGE
and V
TEMP.
(°C)
OUT2
DFN
(Pb-Free)
PACKAGE
voltages. There is an internal 1MΩ pull-up resistor.
TB347
L12.4x3
DWG.
PKG.
#
ISL8022
for
DESCRIPTION
Pin Configuration
OUT1
OUT2
PGND1
, when driven to high. Shutdown the V
, when driven to high. Shutdown the V
VIN1
FB1
EN1
LX1
PG
1
2
3
4
6
5
(12 LD DFN)
TOP VIEW
ISL8022
IN2
is ≥ V
www.DataSheet4U.com
IN1
12
11
10
OUT1
OUT2
9
8
7
. Connect 10µF
FB2
EN2
SYNC
VIN2
LX2
PGND2
.
.
June 9, 2010
FN7650.0
OUT1
OUT2