ISL8104 Intersil Corporation, ISL8104 Datasheet - Page 7

• Manufacturer Part Number: ISL8104
• Description: Synchronous Buck Pulse-Width Modulator (PWM) Controller
• Manufacturer: Intersil Corporation

typical soft-start interval. The rise time of the output voltage is,
therefore, dependent upon the value of the soft-start
capacitor, C
start capacitance value can be calculated through:
If an external reference is used, then the soft-start
capacitance can be calculated through:
Prebiased Load Start-up
Drivers are held in tri-state (UG pulled to Phase, LG pulled to
PGND) at the beginning of a soft-start cycle until two PWM
pulses are detected. The low side MOSFET is turned on first
to provide for charging of the bootstrap capacitor. This
method of driver activation provides support for start-up into
prebiased loads by not activating the drivers until the control
loop has entered its linear region, thereby substantially
reducing output transients that would otherwise occur had
the drivers been activated at the beginning of the soft-start
cycle.
SSDONE
Soft-start done is only available in the 16 Lead QFN
packaging option of the ISL8104. When the soft-start pin
reaches 4V, an open drain signal is provided to support
sequencing requirements. SSDONE is deasserted by
disabling of the part, including pulling SS low, and by POR
and OCP events.
Oscillator
The oscillator is a triangular waveform, providing for leading
and falling edge modulation. The peak to peak of the ramp
amplitude is set at 1.9V and varies as a function of
frequency. At 50kHz the peak to peak amplitude is
approximately 1.8V while at 1.5MHz it is approximately 2.2V.
In the event the regulator operates at 100% duty cycle for 64
clock cycles an automatic boot cap refresh circuit will
activate turning on LG for approximately 1/2 of a clock cycle.
Overcurrent Protection
The OCP function is enabled with the drivers at start-up.
OCP is implemented via a resistor (R
capacitor (C
drain of the high side MOSEFT. An internal 200
source develops a voltage across R
compared with the voltage developed across the high side
MOSFET at turn on as measured at the PHASE pin. When
the voltage drop across the MOSFET exceeds the voltage
drop across the resistor, a sourcing OCP event occurs.
C
voltage across R
on the input bus.
C
OCSET
C
SS
SS
=
=
30µA t
----------------------------
30µA t
----------------------------
V
is placed in parallel with R
REFEXT
SS
OCSET
2V
. If the internal reference is used, then the soft-
⋅
⋅
SS
SS
OCSET
) connecting the OCSET pin and the
in the presence of switching noise
7
OCSET
OCSET
OCSET
to smooth the
which is then
) and a
m
A current
ISL8104
A 120ns blanking period is used to reduce the current
sampling error due to leading-edge switching noise. An
additional simultaneous 120ns low pass filter is used to
further reduce measurement error due to noise.
OCP faults cause the regulator to disable (upper and lower
drives disabled, SSDONE pulled low, soft-start capacitor
discharged) itself for a fixed period of time, after which a
normal soft-start sequence is initiated. If the voltage on the
SS pin is already at 4V and an OCP is detected, a 30µA
current sink is immediately applied to the SS pin. If an OCP
is detected during soft-start, the 30µA current sink will not be
applied until the voltage on the SS pin has reached 4V. This
current sink discharges the CSS capacitor in a linear
fashion. Once the voltage on the SS pin has reached
approximately 0V, the normal soft-start sequence is initiated.
If the fault is still present on the subsequent restart, the
ISL8104 will repeat this process in a hiccup mode. Figure 4
shows a typical reaction to a repeated overcurrent condition
that places the regulator in a hiccup mode. If the regulator is
repeatedly tripping overcurrent, the hiccup period can be
approximated by the following formula:
The OCP trip point varies mainly due to MOSFET r
variations and layout noise concerns. To avoid overcurrent
tripping in the normal operating load range, find the R
resistor from the following equations with:
I
OCP
1. The maximum r
2. The minimum I
T
HICCUP
temperature;
FIGURE 4. TYPICAL OVERCURRENT PROTECTION
V
SS
I
LOAD
=
8V C
----------------------- -
30µA
⋅
OCSET
SS
DS(ON)
T
HICCUP
from the specification table;
at the highest junction
V
SSDONE
February 13, 2006
DS(ON)
OCSET
FN9257.0