ISL8112 Intersil Corporation, ISL8112 Datasheet

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... ISL8112 is a dual-output Synchronous Buck controller with 2A integrated driver. It features high light load efficiency which is especially preferred in systems concerned with high efficiency in wide load range, like the battery powered system. ISL8112 includes two constant on-time PWM controllers. Either of the two outputs can operate in output fixed mode or adjustable mode ...

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... Pinout ISL8112 (32 LD 5X5 QFN) TOP VIEW VREF1 VCC 3 EN_LDO 4 VREF2 5 VIN 6 LDO 7 LDOREF ISL8112 BOOT2 24 23 LG2 PGND 22 GND PVCC LG1 18 BOOT1 FN6396.0 November 21, 2006 ...

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... OUT2REF) DC Load Regulation Line Regulation Current-Limit Current Source ILIM_ Adjustment Range Current-Limit Threshold (Positive, Default) 3 ISL8112 Thermal Information Thermal Resistance (Typical QFN (Notes Operating Temperature Range . . . . . . . . . . . . . . . .-40°C to +100°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C = +25° ...

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... LDO Output Accuracy in Adjustable Mode LDOREF Input Range LDO Output Current LDO Output Current During Switch Over LDO Output Current During Switch Over to 3.3V LDO Short-Circuit Current 4 ISL8112 = +25°C. (Continued) A CONDITIONS GND - PH_ VILIM_ = 0.5V VILIM_ = 1V VILIM_ = 2V MODE = GND, VREF1, or OPEN, GND - PH_ ...

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... PGOOD_ Output Low Voltage PGOOD_ Leakage Current Thermal-Shutdown Threshold Output Undervoltage Shutdown Threshold Output Undervoltage Shutdown Blanking Time INPUTS AND OUTPUTS FB1 Input Voltage 5 ISL8112 = +25°C. (Continued) A CONDITIONS Rising edge of PVCC Falling edge of PVCC Rising edge at BYP regulation point LDOREF = GND LDOREF = VCC LDO to BYP, BYP = 5V, LDOREF > ...

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... MOSFET DRIVERS UG_ Gate-Driver Sink/Source Current LG_ Gate-Driver Source Current LG_ Gate-Driver Sink Current UG_ Gate-Driver On-Resistance LG_ Gate-Driver On-Resistance Dead Time VSEN1, VSEN2 Discharge On Resistance 6 ISL8112 = +25°C. (Continued) A CONDITIONS VSEN2 Dynamic Range, VSEN2= V OUT2REF Fixed VSEN2 = 1.05V Fixed VSEN2 = 3.3V Fixed LDO = 5V ...

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... No connection pin. Externally connect it to ground. 20 GND Analog Ground for both SMPS_ and LDO. Connect externally to the underside of the exposed pad. 21 PGND Power Ground for SMPS_ controller. Connect PGND externally to the underside of the exposed pad ISL8112 FUNCTION FN6396.0 November 21, 2006 ...

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... OUTPUT LOAD (A) FIGURE 1.05V EFFICIENCY vs LOAD (300kHz) OUT2 8 ISL8112 FUNCTION Circuit of Figure 17 and Figure 18, no load on LDO, VSEN1, VSEN2, VREF2, and VREF1 12V, EN2 = EN1 = VCC, VBYP = 5V, PVCC = 5V, VEN_LDO = 5V unless otherwise noted. Typical values are at T ULTRA SKIP MODE ...

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... OUTPUT LOAD (A) FIGURE 1.5V FREQUENCY vs LOAD OUT1 9 ISL8112 Circuit of Figure 17 and Figure 18, no load on LDO, VSEN1, VSEN2, VREF2, and VREF1 12V, EN2 = EN1 = VCC, VBYP = 5V, PVCC = 5V, VEN_LDO = 5V unless otherwise noted. Typical values are at T ULTRA SKIP MODE IN ...

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... BYP = 5V 4.88 4.86 4. 100 OUTPUT LOAD (mA) FIGURE 13. LDO OUTPUT 5V vs LOAD 10 ISL8112 Circuit of Figure 17 and Figure 18, no load on LDO, VSEN1, VSEN2, VREF2, and VREF1 12V, EN2 = EN1 = VCC, VBYP = 5V, PVCC = 5V, VEN_LDO = 5V unless otherwise noted. Typical values are ...

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... Both SMPS1 and SMPS2 PWM controllers consist of a triple-Mode feedback network and multiplexer, a multi-input PWM comparator, high-side and low-side gate drivers and logic. In addition, SMPS2 can also use OUT2REF to track its output from 0.5V to 2.50V. The ISL8112 contains fault- protection circuits that monitor the main PWM outputs for 11 ISL8112 ...

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... V DROP1 inductor discharge path, including synchronous rectifier, inductor, and PC board resistances • V DROP2 charging path, including high-side switch, inductor, and PC board resistances • the on-time calculated by the ISL8112. ON TABLE 2. APPROXIMATE K-FACTOR ERRORS SMPS (FS = GND, VREF1, or OPEN), VSEN1 (FS = GND), VSEN2 ...

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... VCC R1 7.87kΩ 5V FB1 TIED TO GND = 5V FB1 TIED TO VCC = 1. 200kΩ 10kΩ GND VCC VCC FIGURE 17. ISL8112 TYPICAL DYNAMIC GFX APPLICATION CIRCUIT 13 ISL8112 5V C5 1µF PVCC VCC LDO VIN LDOREF BOOT1 BOOT2 UG2 UG1 PH2 PH1 ...

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... FB1 TIED TO GND = 5V FB1 TIED TO VCC = 1.5V R3 200kΩ OFF OFF OFF VCC VCC FREQUENCY-DEPENDENT COMPONENTS 1.5V/1.05V SMPS C11 FIGURE 18. ISL8112 TYPICAL SYSTEM REGULATOR APPLICATION CIRCUIT 14 ISL8112 5V C5 1µF PVCC VCC LDO VCC VIN LDOREF BOOT1 BOOT2 UG2 UG1 C4 0.22µF ...

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... FB1 tied to VCC=1. 200k 200k Ω 43kO 43kO VCC VCC GND GND VCC VCC FREQUENCY-DEPENDENT COMPONENTS C11 FIGURE 19. ISL8112 TYPICAL SYSTEM REGULATOR APPLICATION CIRCUIT 15 ISL8112 R7 R7 Ω µ 1 µ PVCC PVCC VCC VCC LDO LDO VIN ...

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... VSEN1 BYP SW THRES. LDO LDO LDOREF VIN EN_LDO POWER-ON POWER-ON SEQUENCE SQUENCE EN1 CLEAR FAULT CLEAR FAULT LATCH LATCH EN2 FIGURE 20. DETAIL FUNCTIONAL DIAGRAM ISL8112 16 ISL8112 FS MODE SMPS2 SYNCH. PWM BUCK CONTROLLER EN2 PGOOD2 VSEN2 INTERNAL LOGIC VREF2 THERMAL THERMAL VREF1 ...

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... The load-current level at which PFM/PWM crossover occurs, I LOAD(SKIP) the peak-to-peak ripple current, which is a function of the inductor value (Figure 22). For example, in the ISL8112 typical application circuit with VOUT1 = 5V 7.6µH, and K = 5µs, switch over to pulse-skipping operation occurs ...

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... No switch over action in adjustable mode. Current-Limit Circuit (ILIM_) with r Temperature Compensation The current-limit circuit employs a "valley" current-sensing algorithm. The ISL8112 uses the on-resistance of the synchronous rectifier as a current-sensing element. If the magnitude of the current-sense signal at PH_ is above the current-limit threshold, the PWM is not allowed to initiate a new cycle. The actual peak current is greater than the 40µ ...

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... ILIM_ is adjusted. The current-limit threshold is adjusted with an external resistor for ISL8112 at ILIM_. The current-limit threshold adjustment range is from 20mV to 200mV. In the adjustable mode, the current-limit threshold ...

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... UVP only applies to the buck outputs. • Thermal Protection The ISL8112 has thermal shutdown to protect the devices from overheating. Thermal shutdown occurs when the die temperature exceeds +150°C. All internal circuitry shuts down during thermal shutdown. The ISL8112 may trigger ...

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... Shutdown Mode The ISL8112 SMPS1, SMPS2 and LDO have independent enabling control. Drive EN1, EN2 and EN_LDO below the precise input falling-edge trip level to place the ISL8112 in its low-power shutdown state. The ISL8112 consumes only 20µA of quiescent current while in shutdown. When shutdown mode activates, the 3.3V VREF2 remain on. Both SMPS outputs are discharged to 0V through a 25Ω ...

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... Inductor values lower than this grant no further size-reduction benefit. OUT2 OUT2 The ISL8112 pulse-skipping algorithm (MODE = GND) initiates skip mode at the critical conduction point, so the inductor's operating point also determines the load current at which PWM/PFM switch over occurs. The optimum point is usually found between 20% and 50% ripple current ...

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... V from the SOAR DS(ON) where I Input Capacitor Selection The input capacitors must meet the input-ripple-current (IRMS) requirement imposed by the switching current. The ISL8112 dual switching regulator operates at different ( 0.35 2 ⁄ ) – frequencies. This interleaves the current pulses drawn by the two switches and reduces the overlap time where they (EQ ...

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... Switching losses in the high-side MOSFET can become an insidious heat problem when maximum battery voltage is applied, due to the squared term in the CV equation. Reconsider the high-side MOSFET chosen for 24 ISL8112 adequate r (EQ. 17) extraordinarily hot when subjected to V Calculating the power dissipation in NH (Q1/Q3) due to switching losses is difficult since it must allow for quantifying factors that influence the turn-on and turn-off times ...

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... PH_ (ISL8112) and GND connections to the synchronous rectifiers for current limiting must be made using Kelvin- sense connections to guarantee the current-limit accuracy with 8-pin SO MOSFETs. This is best done by routing ...

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... MOSFET, input, and output capacitors) to the small island with a single short, wide connection (preferably just a via). Create PGND islands on the layer just below the top-side layer (refer to the ISL8112 EV kit for an example) to act as an EMI shield if multiple layers are available (highly recommended). Connect each of these individually to the star ground via, which connects the top side to the PGND plane ...

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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 27 ISL8112 L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-2 ISSUE C ...