ISL8724 Intersil Corporation, ISL8724 Datasheet - Page 6

• Manufacturer Part Number: ISL8724
• Description: (ISL8723 / ISL8724) Power Sequencing Controllers
• Manufacturer: Intersil Corporation

the ~10ms enable delay to initiate DLY_ON cap charging
when released to go high. This feature can be used where
4 voltages can be monitored in addition to a on-off switch
position or, in the case of the ISL8724 a present pin pull
down.
Restart of the turn on sequence is automatic once all
requirements are met. This allows for no interaction
between the sequencer and a controller IC if so desired.
If no capacitors are connected between DLY_ON or
DLY_OFF pins and ground then all such related GATEs
start to turn on immediately after the 10ms (T
ENABLE stabilization time out has expired and the GATEs
start to immediately turn off when ENABLE is deasserted.
Table 1 illustrates the nominal time delay from the start of
charging to the 1.27V reference for various capacitor
values on the DLY_X pins. This table does not include the
10ms of enable lock out delay during a start up sequence
but represents the time from the end of the enable lock out
delay to the start of GATE transition. There is no enable
lock out delay for a sequence off, so this table illustrates
the delay to GATE transition from a disable signal.
Figure 2 illustrates the turn-on and Figure 3 the nominal turnoff
timing diagrams of the ISL8723 and ISL8724 product.
Note the delay and flexible sequencing possibilities. Multiple
series, parallel or adjustable capacitors can be used to easily
fine tune timing between that offered by standard value
capacitors.
NOTE: Nom. T
DLY PIN CAPACITANCE
NOMINAL DELAY TO SEQUENCING THRESHOLD
1000pF
0.01μF
100pF
0.1μF
Open
1μF
DEL_SEQ
= dly_cap (µF) X 1.35MΩ
TABLE 1.
6
TIME (ms)
0.135
1350
0.02
1.35
13.5
135
UVLOdel
ISL8723, ISL8724
)
December 21, 2006
FN6413.0