N74F85D,512 NXP Semiconductors, N74F85D,512 Datasheet - Page 2
![IC COMPARATOR MAGNITUDE 16SOIC](/photos/6/52/65286/16-soic_sot109-1_sml.jpg)
N74F85D,512
Manufacturer Part Number
N74F85D,512
Description
IC COMPARATOR MAGNITUDE 16SOIC
Manufacturer
NXP Semiconductors
Series
74Fr
Type
Magnitude Comparatorr
Datasheet
1.N74F85N602.pdf
(10 pages)
Specifications of N74F85D,512
Number Of Bits
4
Delay Time - Propagation
9.5ns
Current - Supply
40mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3190-5
933778010512
N74F85D
933778010512
N74F85D
Philips Semiconductors
FEATURES
DESCRIPTION
The 74F85 is a 4-bit magnitude comparator that can be expanded to
almost any length. It compares two 4-bit binary, BCD, or other
monotonic codes and presents the three possible magnitude results
at the outputs. The 4-bit inputs are weighted (A0–A3) and (B0–B3)
where A3 and B3 are the most significant bits. The operation of the
74F85 is described in the Function Table, showing all possible logic
conditions. The upper part of the table describes the normal
operation under all conditions that will occur in a single device or in
a series expansion scheme. In the upper part of the table the three
outputs are mutually exclusive. In the lower part of the table, the
outputs reflect the feed-forward conditions that exist in the parallel
expansion scheme. The expansion inputs I
are the least significant bit positions. When used for series
expansion, the A>B, A=B and A<B outputs of the lease significant
word are connected to the corresponding I
of the next higher stage. Stages can be added in this manner to any
length, but a propagation delay penalty of about 15ns is added with
each additional stage. For proper operation, the expansion inputs of
the least significant word should be tied as follows: I
I
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
NOTE: One (1.0) FAST unit load is defined as: 20 A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
A=B
September 27, 1994
High-impedance NPN base inputs for reduced loading
(20 A in High and Low states)
Magnitude comparison of any binary words
Serial or parallel expansion without extra gating
V
GND = Pin 8
4-bit magnitude comparator
CC
2
3
4
= High, and I
A<B, A=B, A>B
I
= Pin 16
A<B
A0–A3
B0–B3
, I
PINS
A=B
I
I
I
A<B
A=B
A>B
, I
A0
10
A>B
A<B
A1
12
= Low.
13
A2
Comparing inputs
Comparing inputs
Expansion inputs (active High)
Data outputs (active High)
A>B
5
15
A3
A=B
6
B0
A<B
9
7
A>B
A>B
DESCRIPTION
B1
11
, I
, and I
A=B
B2
14
SF00076
and I
A>B
A=B
B3
1
= Low,
and I
A<B
inputs
A<B
2
PIN CONFIGURATION
ORDERING INFORMATION
IEC/IEEE SYMBOL
16-pin plastic DIP
16-pin plastic SO
DESCRIPTION
74F85
TYPE
74F (U.L.) HIGH/LOW
1.0/0.033
1.0/0.033
1.0/0.033
50/33
10
12
13
15
9
11
14
1
2
3
4
PROPAGATION
I
I
I
GND
A<B
A=B
A>B
A>B
A=B
A<B
TYPICAL
B3
DELAY
7.0ns
COMMERCIAL RANGE
T
1
2
3
4
5
6
7
8
amb
V
0
3
0
3
<
=
>
CC
= 0 C to +70 C
N74F85N
N74F85D
= 5V 10%,
COMP
P
Q
LOAD VALUE HIGH/LOW
P<Q
P=Q
P>Q
SF00075
16
15
14
13
12
10
11
9
SUPPLY CURRENT
1.0mA/20mA
V
A3
B2
A2
A1
B1
A0
B0
20 A/20 A
20 A/20 A
20 A/20 A
Product specification
SF00077
CC
TYPICAL
(TOTAL)
853–0055 13903
40mA
7
6
5
PKG DWG #
SOT162-1
74F85
SOT38-4