HEF4024BP,652 NXP Semiconductors, HEF4024BP,652 Datasheet - Page 6

• Manufacturer Part Number: HEF4024BP,652
• Description: IC 7STAGE BINARY COUNTER 14DIP
• Manufacturer: NXP Semiconductors
• Series: 4000Br
• Type: Binaryr

Specifications of HEF4024BP,652

• Package / Case: 14-DIP (0.300", 7.62mm)
• Logic Type: Binary Counter
• Direction: Up
• Number Of Elements: 1
• Number Of Bits Per Element: 7
• Reset: Asynchronous
• Count Rate: 35MHz
• Trigger Type: Negative Edge
• Voltage - Supply: 4.5 V ~ 15.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Counter Type: Binary Counters
• Logic Family: HEF4024
• Number Of Bits: 7
• Operating Supply Voltage: 3 V to 15 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Technology: CMOS
• Number Of Elements: 1
• Logical Function: Counter/Divider
• Operating Supply Voltage (typ): 3.3/5/9/12V
• Output Type: Standard
• Package Type: DIP
• Propagation Delay Time: 240ns
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 15V
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Timing: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 933282630652; HEF4024BPN; HEF4024BPN

NXP Semiconductors
Table 7.
V
[1]
[2]
Table 8.
P
HEF4024B_5
Product data sheet
Symbol Parameter
t
t
t
f
Symbol
P
t
W
rec
max
SS
D
D
can be calculated from the formulas shown. V
= 0 V; T
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
t
t
is the same as t
transition time
pulse width
recovery time
maximum
frequency
Dynamic characteristics
Dynamic power dissipation P
Parameter
dynamic power
dissipation
amb
= 25 C; for test circuit see
TLH
and t
THL
.
Conditions
see
CP HIGH;
minimum width
see
MR HIGH;
minimum width
see
MR;
see
CP input;
J = K = HIGH;
see
V
10 V
15 V
5 V
DD
Figure 5
Figure 5
Figure 5
Figure 5
Figure 5
…continued
Typical formula for P
P
P
P
Figure
D
D
D
D
= 500
= 2100
= 5200
Rev. 05 — 9 November 2009
SS
V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
10 V
15 V
6; unless otherwise specified.
5 V
5 V
5 V
5 V
5 V
DD
= 0 V; t
f
i
f
f
[2]
+ (f
i
i
+ (f
+ (f
r
= t
o
o
o
f
Extrapolation formula
10 ns + (1.00 ns/pF)C
C
D
9 ns + (0.42 ns/pF)C
6 ns + (0.28 ns/pF)C
C
C
20 ns; T
L
)
( W)
L
L
)
)
V
V
V
DD
DD
DD
amb
2
2
2
= 25 C.
Where:
f
f
C
V
i
o
[1]
L
L
L
(f
DD
= input frequency in MHz;
L
= output frequency in MHz;
o
= output load capacitance in pF;
= supply voltage in V;
C
Min
-
-
-
L
60
30
20
80
35
25
20
15
15
13
18
) = sum of the outputs.
5
7-stage binary counter
HEF4024B
Typ
60
30
20
30
15
10
40
20
15
10
10
25
35
5
5
© NXP B.V. 2009. All rights reserved.
Max
120
-
-
-
-
-
-
-
-
-
-
-
-
60
40
L
in pF).
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
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