SM5956A NPC, SM5956A Datasheet - Page 13

• Manufacturer Part Number: SM5956A
• Description: 6-channel Asynchronous Sample Rate Converter
• Manufacturer: NPC

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Output mode select
Output timing
See the timing for each of the output formats in figures 10 to 18. In slave mode, note that the LRCO and BCKO
as timing shown in figures 10 to 14 must be inputted externally. In through mode, note that the LRCI, BCKI,
DI* inputs are passed to the outputs as-is, regardless of the output data format setting, and that DITO is a
LOW-level output.
Note. DI*: DIA, DIB, DIC pins
Output-System Clock (SCK, SCKSLN pins)
The output-system clock input must have a frequency of either 512fso or 768fso, where fso is the output-sys-
tem sampling frequency. In master mode, the LRCO and BCKO signals are derived from this clock input by
frequency division. This clock is also used as the system clock by the internal processing circuits.
THROUN
DO*: DOA, DOB, DOC pins
H
L
SCKSLN
Pins
H
L
SLAVEN
L or H
H
L
512fso (fso = output-system sampling frequency)
LRCO rate → 1fso
BCKO rate → 64fso
768fso (fso = output-system sampling frequency)
LRCO rate → 1fso
BCKO rate → 48fso
Through
Master
Mode
Slave
LRCO, BCKO are derived by frequency division of
the SCK input clock.
LRCO, BCKO are supplied externally.
When SCKSLN = L, BCKO is set to 64fso.
When SCKSLN = H, BCKO is set to 48fso.
The LRCI, BCKI, DIA, DIB, DIC inputs are fed
directly to the LRCO, BCKO, DO* outputs.
The DITO output is LOW-level.
SM5956A
Description
SCK input
Function
SEIKO NPC CORPORATION —13
LRCO, BCKO pin state
Outputs
Outputs
Inputs