74LV4020D,118 NXP Semiconductors, 74LV4020D,118 Datasheet - Page 2
![IC 14STAGE BINARY RIPPLE 16SOIC](/photos/6/52/65286/16-soic_sot109-1_sml.jpg)
74LV4020D,118
Manufacturer Part Number
74LV4020D,118
Description
IC 14STAGE BINARY RIPPLE 16SOIC
Manufacturer
NXP Semiconductors
Series
74LVr
Datasheet
1.74LV4020D112.pdf
(20 pages)
Specifications of 74LV4020D,118
Package / Case
16-SOIC (3.9mm Width)
Logic Type
Binary Counter
Direction
Up
Number Of Elements
1
Number Of Bits Per Element
14
Reset
Asynchronous
Count Rate
100MHz
Trigger Type
Negative Edge
Voltage - Supply
1 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Counter Type
Binary Counters
Logic Family
74LV
Number Of Bits
12
Operating Supply Voltage
1 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Timing
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
74LV4020D-T
74LV4020D-T
935202700118
74LV4020D-T
935202700118
Philips Semiconductors
4. Quick reference data
5. Ordering information
Table 2:
74LV4020_1
Product data sheet
Type number
74LV4020N
74LV4020D
74LV4020DB
74LV4020PW
Ordering information
Package
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
Table 1:
GND = 0 V; T
[1]
Symbol Parameter
t
t
t
f
C
C
PHL
PLH
PHL
max
i
PD
,
C
P
f
f
C
V
N = number of inputs switching;
i
o
D
CC
PD
= input frequency in MHz;
L
(C
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
propagation delay
propagation delay
maximum input clock
frequency
input capacitance
power dissipation
capacitance
PD
V
Quick reference data
CC
CP to Q0
Qn to Q(n+1)
MR to Qn
amb
2
V
CC
Name
DIP16
SO16
SSOP16
TSSOP16
= 25 C; t
f
o
2
) = sum of outputs.
f
i
Rev. 01 — 29 November 2005
N + (C
r
= t
f
= 2.5 ns.
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
L
V
CC
2
Conditions
C
C
C
per gate; V
V
CC
L
L
L
f
o
= 15 pF; V
= 15 pF; V
= 15 pF; V
) where:
I
= GND to
CC
CC
CC
= 3.3 V
= 3.3 V
= 3.3 V
D
in W).
14-stage binary ripple counter
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
[1]
Min
-
-
-
-
-
-
74LV4020
Typ
12
7
16
100
3.5
20
Max
-
-
-
-
-
-
Version
SOT38-4
SOT109-1
SOT338-1
SOT403-1
Unit
ns
ns
ns
MHz
pF
pF
2 of 20