ST7556 Sitronix Technology, ST7556 Datasheet
ST7556
Related parts for ST7556
ST7556 Summary of contents
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... Sitronix 1. INTRODUCTION The ST7556 is a driver & controller LSI for graphic dot-matrix liquid crystal display systems. It contains 102 segment and 65 common with 1 ICOM driver circuits. This chip is connected directly to a microprocessor, accepts 4-line serial interface (SPI) or 8-bit parallel interface, display data can store in an on-chip display data RAM 102 bits. It performs display data RAM read/write operation with no external operating clock to minimize power consumption ...
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... ST7556 3. PAD Arrangement (COG) Chip Size: 10,310 um × 1,150 um Bump Pitch: PAD 148 , 250 ~ 272 : 75.5 um (com/seg) PAD NO 149 ~ 248 : 75 um (I/O) PAD NO 248 ~ 249 : 93.5 um (Reset) PAD NO 249 ~ 250 : 95.9 um (Reset) Bump Size: PAD 125 , 137 ~ 248 , 250 ~ 261 : 55(x) um × 60(y) um PAD NO 126 ~ 136 , 262 ~ 272 : 60(x)um × 55(y) um ...
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... ST7556 Pad Center Coordinates (NORMAL, TMY=0) PAD NO. PIN Name 1 COM[42] 2 COM[41] 3 COM[40] 4 COM[39] 5 COM[38] 6 COM[37] 7 COM[36] 8 COM[35] 9 COM[34] 10 COM[33] 11 COM[32] 12 Reserve 13 SEG[0] 14 SEG[1] 15 SEG[2] 16 SEG[3] 17 SEG[4] 18 SEG[5] 19 SEG[6] 20 SEG[7] 21 SEG[8] 22 SEG[9] 23 SEG[10] 24 SEG[11] 25 SEG[12] 26 SEG[13] 27 SEG[14] 28 SEG[15] 29 SEG[16] 30 SEG[17] 31 SEG[18] www.DataSheet4U.com ...
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... ST7556 PAD NO. PIN Name 71 SEG[58] 72 SEG[59] 73 SEG[60] 74 SEG[61] 75 SEG[62] 76 SEG[63] 77 SEG[64] 78 SEG[65] 79 SEG[66] 80 SEG[67] 81 SEG[68] 82 SEG[69] 83 SEG[70] 84 SEG[71] 85 SEG[72] 86 SEG[73] 87 SEG[74] 88 SEG[75] 89 SEG[76] 90 SEG[77] 91 SEG[78] 92 SEG[79] 93 SEG[80] 94 SEG[81] 95 SEG[82] 96 SEG[83] 97 SEG[84] 98 SEG[85] 99 SEG[86] 100 SEG[87] 101 SEG[88] 102 SEG[89] www.DataSheet4U.com 103 ...
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... ST7556 PAD NO. PIN Name 143 COM[27] 144 COM[28] 145 COM[29] 146 COM[30] 147 COM[31] 148 Reserve 149 T9 150 VDD 151 VDD 152 VDD 153 VDD 154 VDD 155 VDD 156 VDD2 157 VDD2 158 VDD2 159 VDD2 160 VDD2 161 VDD2 ...
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... ST7556 PAD NO. PIN Name 215 V1 216 V2 217 V3 218 V4 219 VSS2 220 VSS2 221 VSS2 222 VSS2 223 VSS2 224 VSS2 225 VSS2 226 VSS2 227 VSS2 228 VSS2 229 VSS2 230 VSS2 231 VSS 232 VSS 233 VSS 234 VSS 235 ...
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... ST7556 Pad Center Coordinates (REVERSE, TMY=1) PAD NO. PIN Name 1 COM[22] 2 COM[23] 3 COM[24] 4 COM[25] 5 COM[26] 6 COM[27] 7 COM[28] 8 COM[29] 9 COM[30] 10 COM[31] 11 Reserve 12 Reserve 13 SEG[0] 14 SEG[1] 15 SEG[2] 16 SEG[3] 17 SEG[4] 18 SEG[5] 19 SEG[6] 20 SEG[7] 21 SEG[8] 22 SEG[9] 23 SEG[10] 24 SEG[11] 25 SEG[12] 26 SEG[13] 27 SEG[14] 28 SEG[15] 29 SEG[16] 30 SEG[17] 31 SEG[18] www.DataSheet4U.com ...
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... ST7556 PAD NO. PIN Name 71 SEG[58] 72 SEG[59] 73 SEG[60] 74 SEG[61] 75 SEG[62] 76 SEG[63] 77 SEG[64] 78 SEG[65] 79 SEG[66] 80 SEG[67] 81 SEG[68] 82 SEG[69] 83 SEG[70] 84 SEG[71] 85 SEG[72] 86 SEG[73] 87 SEG[74] 88 SEG[75] 89 SEG[76] 90 SEG[77] 91 SEG[78] 92 SEG[79] 93 SEG[80] 94 SEG[81] 95 SEG[82] 96 SEG[83] 97 SEG[84] 98 SEG[85] 99 SEG[86] 100 SEG[87] 101 SEG[88] 102 SEG[89] www.DataSheet4U.com 103 ...
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... ST7556 PAD NO. PIN Name 143 COM[37] 144 COM[36] 145 COM[35] 146 COM[34] 147 COM[33] 148 COM[32] 149 T9 150 VDD 151 VDD 152 VDD 153 VDD 154 VDD 155 VDD 156 VDD2 157 VDD2 158 VDD2 159 VDD2 160 VDD2 161 VDD2 ...
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... ST7556 PAD NO. PIN Name 215 V1 216 V2 217 V3 218 V4 219 VSS2 220 VSS2 221 VSS2 222 VSS2 223 VSS2 224 VSS2 225 VSS2 226 VSS2 227 VSS2 228 VSS2 229 VSS2 230 VSS2 231 VSS 232 VSS 233 VSS 234 VSS 235 ...
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... ST7556 4. BLOCK DIAGRAM www.DataSheet4U.com Ver 2.2 Fig.1 block diagram 11/43 2005/10/05 ...
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... ST7556 5. PINNING DESCRIPTIONS Pin Name I/O LCD driver outputs SEG0 to SEG101 O COM0 to COM64 O COMS O TMX I TMY I MICROPROCESSOR INTERFACE I P/S I IMS www.DataSheet4U.com I CSB I RESB Ver 2.2 Description LCD segment driver outputs This display data and the M signal control the output voltage of segment driver. Segment drover output voltage ...
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... ST7556 /WR(R/W) I /RD ( I/O D6 (SI) D7 (SCL) LCD DRIVER SUPPLY I OSC Power Supply Pins Power V SS1 Supply Power V SS2 Supply www.DataSheet4U.com Power VDD Supply V Power DD2 Ver 2.2 It determines whether the data bits are data or a command. A0=" H “: Indicates that are display data. ...
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... Supply Power V0,V1, V2, V3, V4 Supply Power VRS Supply Test Pin Test0~Test11 T Reserve Pin ST7556 I/O PIN ITO Resister Limitation PIN Name PS,IMS,OSC T1~T8, VRS VDD, Vdd2, Vss1, Vss2 , Vlcdin , Vlcdout A0,/WR,/RD,CSB, D0 …D7 RESB www.DataSheet4U.com Ver 2.2 If the internal voltage generator is used, the V connected together and series one capacitor to VSS2. ...
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... MICROPROCESSOR INTERFACE Chip Select Input There is CSB pin for chip selection. The ST7556 can interface with an MPU when CSB is "L". When CSB is “H”, these pins are set to any other combination, A0, /RD(E), and /WR(R/W) inputs are disabled and are to be high impedance. ...
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... A0 Busy Flag The Busy Flag indicates whether the ST7556 is operating or not. When D7 is "H" in read status operation, this device is in busy status and will accept only read status instruction. If the cycle time is correct, the microprocessor needs not to check this flag before each instruction, which improves the MPU performance. ...
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... ADDRESSING Data is downloaded in bytes into the RAM matrix of ST7556 as indicated in Figs. The display RAM has a matrix 102 bits. The address pointer addresses the columns. The address ranges are 101 (1100101 (1000). Addresses outside these ranges are not allowed. ...
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... ST7556 Data structure MSB D7 D0 LSB D7 1 bit Page Page 9 1 bit ICOM 1 bit Fig.6 Sequence of writing data bytes into RAM with vertical addressing (V= 102 204205206 306307308 408409410 510511512 612613614 714715716 816817818 0 www.DataSheet4U.com Fig.7 sequence of writing data bytes into RAM with horizontal addressing (V=0) Ver 2 ...
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... ST7556 Page Address Data ...
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... ST7556 Oscillator The on-chip oscillator provides the clock signal for the display system. No external components are required and the OSC input must be connected to VDD. An external clock signal, if used, is connected to this input. Display Timing Generator Circuit This circuit generates some signals to be used for displaying LCD. The display clock, CL (internal), generated by oscillation clock, generates the clock for the line counter and the signal for the display data latch ...
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... ST7556 7. RESET CIRCUIT Setting RESB to “ L ” or Reset instruction can initialize internal function. When RESB becomes “ L ” , following procedure is executed Page address: 0 Column address: 0 Oscillator: OFF Power down mode ( Horizontal addressing ( normal instruction set ( Display OFF ( ...
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... ST7556 8. INSTRUCTION TABLE WR INSTRUCTION A0 (R/W) H NOP 0 0 Reset 0 0 Function set 0 0 Read status byte 0 1 Read data 1 1 Write data INSTRUCTION A0 (R/W) H=0 Display control 0 0 Set Y address RAM Set X address RAM H=1 Internal register 0 0 S/W initial 0 0 Bias system ...
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... Normal mode 1 1 Inverse video mode D2~D0 ST7556 will return the fix data “101” as identification bit Write data 8-bit data of Display Data from the microprocessor can be written to the RAM location specified by the column address and www.DataSheet4U.com page address. The column address is increased by 1 automatically so that the microprocessor can continuously write data to the addressed page ...
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... ST7556 H=”0” Display Control This bits D and E selects the display mode WR(R/ Flag Description D E The bits D and E select the display mode Display off D Normal display 0 1 All display segments Inverse video mode Set Y address of RAM Y [3:0] defines the Y address vector address of the display RAM ...
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... ST7556 H=”1” S/W initial internal register st The 1 Instruction A0 D7 WR(R/ The 2 Instruction A0 D7 WR(R/ System Bias Select LCD bias ratio of the voltage required for driving the LCD WR(R/ LCD bias voltage ...
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... Vop generating a VLCDIN voltage that will exceed the maximum of 10.6V when operating at – 30 ℃ . www.DataSheet4U.com Ver 2 × SYMBOL VALUE a 6. VOP [6:0](programmed) {00 hex… 7F hex} Fig 13. V programming of ST7556 OP 26/43 UNIT ..... (1) 2005/10/05 ...
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... ST7556 10. COMMAND DESCRIPTION Referential Instruction Setup Flow: Initializing with the built-in Power Supply Circuits www.DataSheet4U.com Ver 2.2 User System Setup by External Pins Start of Initialization Power ON(VDD-VSS) Keeping the /RES Pin="L" Waiting for Stabilizing the Power Release the reset state. (/RESB pin="H") Waiting reset circuit stablized(> ...
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... ST7556 Referential Instruction Setup Flow: Initializing without the built-in Power Supply Circuits www.DataSheet4U.com Ver 2.2 User System Setup by External Pins Start of Initialization Power ON(VDD-VSS) Keeping the /RES Pin="L" Waiting for Stabilizing the Power Release the reset state. (/RESB pin="H") Waiting reset circuit stablized(> ...
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... ST7556 Referential Instruction Setup Flow: Data Displaying Referential Instruction Setup Flow: Power OFF www.DataSheet4U.com Ver 2.2 End of Initialization Display Data RAM Addressing by Instruction [Set Page Address] [Set Column Address] Write Display Data by Instruction [Display Data Write] Turn Display ON/OFF Instruction [Display ON/OFF] End of Data Display Figure 16 ...
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... Ver 2.2 Symbol VDD, VDD2 V0 VLCDIN V1, V2, V3, V4 VIN VO TOPR TSTR System (MPU) side 30/43 Conditions Unit –0.3 ~ +3 –0.3 ~ +13.5 V 0.3 to Vlcdin V –0.5 to VDD+0.5 V –0.5 to VDD+0.5 V –30 to +85 °C –65 to +150 °C V LCD ST7556 chip side 2005/10/05 ...
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... ST7556 12. DC CHARACTERISTICS 3.3V Item Operating Voltage (1) Operating Voltage (2) High-level Input Voltage Low-level Input Voltage High-level Output Voltage Low-level Output Voltage Input leakage current Output leakage current Liquid Crystal Driver ON Resistance Internal Oscillator fOSC Oscillator External Frequency Input ...
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... ST7556 Bare Dice Consumption Current : During Display, with the Internal Power Supply, Current consumed by total ICs when an external power supply(VDD,VDD2) is used . Test pattern Symbol Display Pattern ISS SNOW Power Down ISS Notes to the DC characteristics 1. The maximum possible V LCD 2. Internal clock 3. Power-down mode. During power down all static currents are switched off. ...
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... ST7556 13. TIMING CHARACTERISTICS System Bus Read/Write Characteristics 1 (For the 8080 Series MPU) A0 /CS WR, (Write (Read) Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) Enable H pulse width (READ) ...
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... ST7556 Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) Enable H pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time ...
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... ST7556 System Bus Read/Write Characteristics 1 (For the 6800 Series MPU) A0 R/W t AW6 CS1 (CS2="1" (Write (Read) Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) ...
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... ST7556 Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) Enable H pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time ...
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... ST7556 SERIAL INTERFACE (4-Line Interface) /CS1 (CS2="1") A0 SCL SI Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time Item Serial Clock Period SCL “ ...
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... ST7556 Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time *1 The input signal rise and fall time (tr, tf) are specified less. ...
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... ST7556 14. RESET TIMING /RES Internal status Item Reset time Reset “L” pulse width Item Reset time Reset “L” pulse width Item Reset time Reset “L” pulse width www.DataSheet4U.com Ver 2 During reset Fig 21. Signal Symbol Condition tR RESB tRW ...
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... ST7556 15. APPLICATION INFORMATION The pinning of the ST7556 is optimized for single plane wiring e.g. for chip-on-glass display modules. Display size: 64x102 pixels. 32 Fig 22. Application diagram: internal charge pump is used and single V 32 www.DataSheet4U.com Fig 23. Application diagram: Internal charge pump is used and two separate VDD(V Ver 2 ...
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... ST7556 32 Fig 24. application diagram : External high voltage generation is used The required minimum value for the external capacitors in an application with the ST7556 are min. 100nF C = min. 1.0 μ F VLCD VDD,2 Higher capacitor values are recommended for ripple reduction. www.DataSheet4U.com Ver 2.2 Display 102 X 65 pixels ...
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... The ST7556 Series can be connected to either 80X86 Series MPUs or to 6800 Series MPUs. Moreover, using the serial interface it is possible to operate the ST7556 series chips with fewer signal lines. The display area can be enlarged by using multiple ST7556 Series chips. When this is done, the chip select signal can be used to select the individual ICs to access. ...
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... ST7556 17. ST7556 Application Note (96x65) www.DataSheet4U.com Ver 2.2 43/43 2005/10/05 ...