ST7556 Sitronix Technology, ST7556 Datasheet - Page 34
![no-image](/images/no-image-200.jpg)
ST7556
Manufacturer Part Number
ST7556
Description
65 x 102 Dot Matrix LCD Controller/Driver
Manufacturer
Sitronix Technology
Datasheet
1.ST7556.pdf
(43 pages)
- Current page: 34 of 43
- Download datasheet (468Kb)
www.DataSheet4U.com
ST7556
*1 The input signal rise time and fall time (tr, tf) is specified at 15 ns or less. When the system cycle time is extremely fast,
*2 All timing is specified using 20% and 80% of VDD as the reference.
*3 tCCLW and tCCLR are specified as the overlap between CSB being “L” and WR and RD being at the “L” level.
Ver 2.2
(tr +tf) ≦ (tCYC8 – tCCLW – tCCHW) for (tr + tf) ≦ (tCYC8 – tCCLR – tCCHR) are specified.
Address hold time
Address setup time
System cycle time
Enable L pulse width (WRITE)
Enable H pulse width (WRITE)
Enable L pulse width (READ)
Enable H pulse width (READ)
WRITE Data setup time
WRITE Address hold time
READ access time
READ Output disable time
Address hold time
Address setup time
System cycle time
Enable L pulse width (WRITE)
Enable H pulse width (WRITE)
Enable L pulse width (READ)
Enable H pulse width (READ)
WRITE Data setup time
WRITE Address hold time
READ access time
READ Output disable time
Item
Item
D0 to D7
D0 to D7
Signal
Signal
WR
WR
RD
RD
A0
A0
tAH8
tAW8
tCYC8
tCCLW
tCCHW
tCCLR
tCCHR
tDS8
tDH8
tACC8
tOH8
tAH8
tAW8
tCYC8
tCCLW
tCCHW
tCCLR
tCCHR
tDS8
tDH8
tACC8
tOH8
Symbol
Symbol
34/43
CL = 100 pF
CL = 100 pF
CL = 100 pF
CL = 100 pF
Condition
Condition
(VDD = 2.7 V , Ta = 30~85°C )
(VDD = 1.8V , Ta = 30~85°C )
Min.
Min.
400
220
180
220
180
640
360
280
360
280
15
40
10
30
80
30
10
—
—
0
0
0
Rating
Rating
Max.
Max.
140
100
240
200
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2005/10/05
Units
Units
ns
ns
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