ST7576 Sitronix Technology, ST7576 Datasheet - Page 46

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ST7576

Manufacturer Part Number
ST7576
Description
Dot Matrix LCD Controller/Driver
Manufacturer
Sitronix Technology
Datasheet
ST7576
*1 The input signal rise and fall time (tr, tf) are specified at 15 ns or less.
*2 All timing is specified using 20% and 80% of VDD1 as the standard.
SERIAL INTERFACE(I
SCL clock frequency
SCL clock low period
SCL clock high period
Data set-up time
Data hold time
SCL,SDA rise time
SCL,SDA fall time
Capacitive load represented by each bus line
Setup time for a repeated START condition
Start condition hold time
Setup time for STOP condition
Tolerable spike width on bus
BUS free time between a STOP and START condition SCL
Ver 1.0
Serial Clock Period
SCL “H” pulse width
SCL “L” pulse width
Data setup time
Data hold time
CS-SCL time
CS-SCL time
Item
2
C Interface)
Item
Signal
CSB
SCL
SI
Signal Symbol
SCL
SCL
SCL
SI
SI
SCL
SCL
SI
SI
46/54
tSCYC
tSHW
tSLW
tSDS
tSDH
tCSS
tCSH
Symbol
FSCLK
TLOW
THIGH
TSU;Data
THD;Data
TR
TF
Cb
TSU;SUA
THD;STA
TSU;STO
TSW
TBUF
Condition
Condition
-
1.3
0.6
100
0
20+0.1Cb 300
20+0.1Cb 300
-
0.6
0.6
0.6
-
1.3
Min.
Min.
240
120
120
190
60
50
40
(V
(V
DD
Rating
Rating
DD
=1.8V,Ta=-30~85℃)
=3.3V,Ta=-30~85℃)
400
-
-
-
0.9
400
-
-
-
50
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Max.
Max.
2007/01/29
KHz
us
us
ns
us
ns
ns
pF
us
us
us
ns
us
Units
Units
ns

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