BT1308W NXP Semiconductors, BT1308W Datasheet
BT1308W
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BT1308W Summary of contents
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... Pin Description 1 main terminal 1 (T1) 2 main terminal 2 (T2) 3 gate (G) 4 mounting base; main terminal 2 (T2) 400 V (BT1308W-400D) 600 V (BT1308W-600D ms) Simplified outline www.DataSheet4U.com Product data sheet I Gate triggering in four quadrants I Direct interfacing to low-power gate drive circuits I Low-power AC fan speed controllers ...
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... I peak gate current GM P peak gate power GM P average gate power G(AV) T storage temperature stg T junction temperature j BT1308W_SER_D_1 Product data sheet BT1308W series D Conditions BT1308W-400D BT1308W-600D full sine wave; T 107 see Figure 4 and prior to surge; j see Figure 2 and ...
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... Hz Fig 2. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values BT1308W_SER_D_1 Product data sheet 0.4 0 Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level 003aac209 = 180 120 0 (A) T(RMS) 003aac207 I I ...
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... I T(RMS) (A) 0.8 0.6 0.4 0 -50 surge duration (s) Fig 5. RMS on-state current as a function of solder point temperature; maximum values Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level 003aac208 I I TSM max j(init (s) p 003aab487 ...
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... Fig 6. Transient thermal impedance from junction to solder point as a function of pulse width BT1308W_SER_D_1 Product data sheet BT1308W series D Conditions full cycle; see Figure 6 full cycle for minimum footprint; see Figure 13 for pad area; see Figure Rev. 01 — 27 February 2008 www ...
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... DRM(max 0. /dt = 0.3 A/ms TM com mA DRM(max / Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level Min Typ Max Unit - ...
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... T2+ G Fig 8. 003aab486 L( (2) ( (V) T Fig 10. Normalized latching current as a function of Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level 003aaa030 (1) (2) (3) (4) (1) (2) (3) ( Normalized gate trigger current as a function of junction temperature ...
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... NXP Semiconductors I H(25 C) Fig 11. Normalized holding current as a function of junction temperature BT1308W_SER_D_1 Product data sheet 2 1.5 1.0 0 Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level 003aaa032 140 © NXP B.V. 2008. All rights reserved ...
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... scale 6.7 3.7 7.3 1.1 4.6 2.3 6.3 3.3 6.7 0.7 REFERENCES JEDEC JEITA SC-73 Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level detail 0.95 0.2 0.1 0.1 0.85 EUROPEAN ISSUE DATE PROJECTION 04-11-10 06-03-16 © NXP B.V. 2008. All rights reserved. SOT223 ...
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... NXP Semiconductors 8. Mounting All dimensions are in mm. Fig 13. Minimum footprint SOT223 All dimensions are in mm. Printed circuit board: FR4 epoxy glass (1.6 mm thick), copper laminate (35 m thick). Fig 14. Printed circuit board pad area SOT223 BT1308W_SER_D_1 Product data sheet BT1308W series D 3.8 min 1.5 min 1.5 2.3 min (3 ) 1.5 min 4 ...
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... NXP Semiconductors 9. Revision history Table 6. Revision history Document ID Release date BT1308W_SER_D_1 20080227 BT1308W_SER_D_1 Product data sheet BT1308W series D Data sheet status Change notice Product data sheet - Rev. 01 — 27 February 2008 www.DataSheet4U.com Triacs logic level Supersedes - © NXP B.V. 2008. All rights reserved. ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 27 February 2008 BT1308W series D www.DataSheet4U.com Triacs logic level © NXP B.V. 2008. All rights reserved ...
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... NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 27 February 2008 Document identifier: BT1308W_SER_D_1 www.DataSheet4U.com Triacs logic level All rights reserved. ...